we hereby provide an add-on to our CDNLive-EMEA 2019 Techtorial V talk.
The package contains three executable appCell examples:
We also provide demo layouts, the appCell source codes and a small SKILL script that demonstrates the integration into Virtuoso.
The attached PDF file describes the appCell examples as well as the steps to run the examples and to open the source code files.
Please consider to share your thoughts and examples as well in the PCell Designer Community Forum. We hope you find the provided appCellDemoLib examples helpful and inspiring.
I am still not sure about what exactly is appCell and how it is different from Classic pcell that we design?
Can we use appCell as an alternative for Pcell?
Also if anyone has any documentation on Cadence Pcell Designer Tool please Share, It will be Helpful
Thank & Regards,
the appCell concept has been envisioned and developed to offer a powerful and user-friendly way to extent the capabilities of Cadence Virtuoso in addition to conventional SKILL/SKILL++ scripts. AppCells hereby utilize and benefit from the vastly enhanced PCell functionality that is provided by the Cadence PCell Designer tool (see below). Conceptually, appCells can be understood as 'apps' (therefore, the name 'appCells') similarly to the apps that most of us use on our smart devices. At first, it may seem odd to use PCell functionality to extend Virtuoso's functionality, but appCells benefit from all the capabilities of the Cadence PCell Designer programming environment. Their implementation, debugging, profiling and documentation is a lot faster and easier compared to conventional SKILL/SKILL++ source code development based on my experience.
While PCells require an instantiation in the schematic or layout view, appCells act as 'tool functions' that may modify your cell view based on their programmed functionality, provided parameters AND the content and context of the cell view(s) they are applied to. Contrary to PCells, appCells are not instantiated in cell views. However, they are added to a project in a classic lib/cell/view form and can be integrated in flows in multiple known ways, such as bind-keys, toolbar icons, menu entries etc. From a programmers perspective, an appCell is typically developed as a parameterizable PCell method that is then executed by end-users within the current cell view context. This is contrary to PCell instances that are executed in a separate and independent cell view context - my words :-).
To really understand the innovation potential provided by appCells, an understanding of the PCell Designer concept is highly beneficial. Among many other things, PCell Designer offers a rich set of built-in and user-extensible high-level commands and a PCell/appCell programming paradigm based on object orientation, data flow programming and functional programming.
You can find conceptual introductions to the visual PCell/appCell programming concept and several related concepts here:
Visual PCell Programming with Cadence PCell Designer (2013) https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/Events/CDNLive/Secured/Proceedings/EU/2013/CUS04.pdf
Advanced Application of Cadence PCell Designer (2014) https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/Events/CDNLive/Secured/Proceedings/EU/2014/CUS06.pdf
Hierarchical Module Design With Cadence PCell Designer (2015) https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/Events/CDNLive/Secured/Proceedings/EU/2015/CUS02.pdf
Schematic and Symbol PCell Development with Cadence PCell Designer (2017) https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/Events/CDNLive/Secured/Proceedings/EU/2017/CUS10.pdf
The PDF files referenced above provide a short overview of the appCell concept. They also contain a brief technical comparison of appCells and PCells (slide #30).
Please feel free to test the appCell approach yourself using the provided GPDK-045 based test cases. While the appCell examples provided above are layout-focused, I would like to point-out that appCells can be used to in schematic, symbol and layout views and from a flow perspective in any sequence and combination of them (e.g. generate schematics and symbols out of a given layout, place IO pads in the layout based on a given schematic or external file, ...). The resulting appCell/PCell code typically contains only a few code lines even for very complex tasks, which makes their development so efficient and convenient.
PS: An analogy for an appCell in the image editing world is a paint brush that manipulates parts of a picture based on given parameters, the region and the pixel neighborhood. You may have several generic and custom paint brushes at your disposal for your individual editing needs. PCell Designer would now allow you to let you create your own set of paint brushes, i.e. appCells, very easily.
Thank you very much for your brief explanation on appCell.
Also the document shared by you will be valuable for me in understanding the advance feature of Pcell Designer Tool.
One query, Is appCell compatible only with gpdk045 or can it be used across other PDK from different Fab?
Thanks and Regards,
appCells can be used with any technology. Goeran's example library was specifically set up for gpdk045 to allow it to be easily shared, but there's no reason why your appCells can't be implemented for any technology.
Thank You for the information.
The appCells approach by itself is generic and not dependent on any technology.
The appCell demo lib provided above was developed by us using the gpdk045 to allow easy testing and evaluation for all Cadence users. The appCell examples can be ported to a different technology if you adjust the layer names of the the PCell code in PCell Designer. Layer names can be defined hard-coded or via PCell internal variables. In the latter case you would only have to adjust it once in your code or via a PDK release procedure. The provided appCell examples use different approaches for layer naming. A second location to check is the add_instance command in the examples which then has to point to the new MOS instances of your technology. A third location are the defaults used in the edits parameters form, which might differ between the gpdk045 and your technology of interest.
There are several ways of separating the logical code from the technology values and technology options, such as CDS techlib lookup, the usage of CDF code and/or the usage of an object oriented PCell approach using inheritance etc. We did not add this to our examples on purpose since our focus was here on the appCell concept.
Thank you for this information. Really appreciate the quick response from you on this discussion.
Also the appCell demo provided by you is easily understandable given the reference documentation.
I am well verse with designing Pcell using Pcell Designer Tool, where in I can design a complex Pcell. Would really like to implement appCell and have a hands on over it to understand its versatility.
Thanks & Regards,