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  3. symbolic pin in IC6

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symbolic pin in IC6

Telekito
Telekito over 13 years ago

 I don't know if this is the right place for my question.

 Recently i begin to use IC6.1, and i need to put a name to some metal lines. In IC5, i used symbolic pin for this, but in cadence 6 i dont know how can do. I try use Netname in metal layer, but when i extract the device, the netname change.

How can i put a name in a net in layout view? I need know V in this net after simulation.

Thanks in advance and sorry for my english.

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  • Andrew Beckett
    Andrew Beckett over 13 years ago

    If you're using a Cadence extraction tool (QRC) and a Cadence LVS tool (e.g. Assura or PVS) you would typically add a pin (geometric pin) at the I/O of your cell - i.e. the pins corresponding to pins on the schematic. You might also have it set up that you can add labels on an appropriate layer to create pins. 

    However, the LVS/extraction process should result in an extracted views where the nets have names corresponding to the matching schematic. 

    SInce this all ought to work, it would probably help if you said what tool you're using for LVS and what you're using for parasitic extraction.

    Thanks,

    Andrew.

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  • Telekito
    Telekito over 13 years ago

    I use DIVA for extract devices and parasitics. I use p-cell and i don't want to do DRC and LVS. For this reason i think i need this:

    Andrew Beckett said:

    You might also have it set up that you can add labels on an appropriate layer to create pins. 

     how i can do this?

     Thanks

     

     

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  • Telekito
    Telekito over 13 years ago

     I have already solved. My problem was i was using a wrong layer. 

     Thank you so much

     

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