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How to avoid Hidden State in VerilogA model for SpectreRF

RFStuff

 Dear All,

I am a beginner in verilogA .

I wrote a code but when I ran PSS it showed hidden state in the code and didn't run.

My behavioural model is as below:-

 

 

// VerilogA for VERILOG_A_MODEL, HARD_LIMIT_GM, veriloga

`include "constants.vams"
`include "disciplines.vams"

module HARD_LIMIT_GM(in,out);
  inout in,out;
  parameter real vtrans = 0;
  parameter real tdelay = 0 from [0:inf);
  parameter real trise = 1p from (0:inf);
  parameter real tfall = 1p from (0:inf);
  parameter real Gm=-5m;
  electrical in,out;
  real vout_val;
  analog begin
 
         @ (cross(V(in) - vtrans, 1))  vout_val = 1;
         @ (cross(V(in) - vtrans, -1)) vout_val = 0;
 
         I(out) <+ Gm * transition( vout_val, tdelay, trise, tfall); 
  end   
endmodule

 

Could anybody please tell how I can avoid the hidden state  (vout_val ) ?

 

Kind Regards,

Parents

  • Thanks a lot!

    Based on the example you pointed me, I adapted my code and this is my newest code:

     

     // Double edge Flip Flop

    `include "constants.vams"

    `include "disciplines.vams"

    module DFF_DEDGE_NOHIDDEN(q, clk, d);

     input clk,d;

     output q;

     voltage q, clk, d;

     parameter real tdelay   = 1n from [0:inf),

                    ttransit = 20p from [0:inf),

                    vout_high = 1,

                    vout_low  = 0 from (-inf:vout_high),

                    vth       = 0.5;

     parameter integer init_state=0 from [0:1];

     integer actNow, out, state;

     analog  begin

        actNow = 0;

        @(initial_step) begin

    actNow = 1;

    state = init_state;

        end

        @(cross(V(clk) - vth, +1) or cross(V(clk) - vth, -1)) begin

    actNow = 1;

    state = (V(d) > vth);

        end

        out = idt(0, state, actNow);

        V(q) <+ transition(out ? vout_high : vout_low, tdelay, ttransit);

     end

    endmodule

     

    But I still have hidden state problems:

    "ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DFF_DEDGE_NOHIDDEN'.  Skipped.

    ... Hidden state variable: state " 

     

    I've read the documentation you attached and I think that variable "state" is constantly updated. Am I missing something?

    Thank you again for yuor precious help 

Reply

  • Thanks a lot!

    Based on the example you pointed me, I adapted my code and this is my newest code:

     

     // Double edge Flip Flop

    `include "constants.vams"

    `include "disciplines.vams"

    module DFF_DEDGE_NOHIDDEN(q, clk, d);

     input clk,d;

     output q;

     voltage q, clk, d;

     parameter real tdelay   = 1n from [0:inf),

                    ttransit = 20p from [0:inf),

                    vout_high = 1,

                    vout_low  = 0 from (-inf:vout_high),

                    vth       = 0.5;

     parameter integer init_state=0 from [0:1];

     integer actNow, out, state;

     analog  begin

        actNow = 0;

        @(initial_step) begin

    actNow = 1;

    state = init_state;

        end

        @(cross(V(clk) - vth, +1) or cross(V(clk) - vth, -1)) begin

    actNow = 1;

    state = (V(d) > vth);

        end

        out = idt(0, state, actNow);

        V(q) <+ transition(out ? vout_high : vout_low, tdelay, ttransit);

     end

    endmodule

     

    But I still have hidden state problems:

    "ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DFF_DEDGE_NOHIDDEN'.  Skipped.

    ... Hidden state variable: state " 

     

    I've read the documentation you attached and I think that variable "state" is constantly updated. Am I missing something?

    Thank you again for yuor precious help 

Children
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