How to avoid Hidden State in VerilogA model for SpectreRF

The reason you have a hidden state is because vout_val is not updated on every iteration. It's only set within the @cross blocks - and is held (and hence retains state) between cross events.

If you replace the two @cross statements with:

     @ (cross(V(in) - vtrans)) ;
     vout_val = V(in)>vtrans;

Then it will do what you want. The first @cross will force there to be a timestep close to either the positive or negative transition - but doesn't have any action within the @cross itself. The second line is simply computing the vout_val based on whether V(in) is greater than vtrans - but does this at every timestep and hence is not a hidden state.

Kind Regards,

Andrew.

 Dear Andrew,

Thanks a lot for your reply. I have some doubts.

1:- Every iteration means:-

Is it each simulation time step ?

2:- Suppose instead of having vout_val= 1 or 0, If I want let's say vout_val= -5 ( for positive edge cross )or +7 ( for -ve edge cross ),

is there a way to achieve this ?

Kind Regards,

1. There could be more than one iteration per time step as it converges - but at least it will evaluate the code on every timestep and a state is hidden if it is not assigned a value every time the behavioural code is executed.
2. Yes - I just simplified it. You could do (instead of my second suggested line):
   
   if (V(in)>vtrans)
     vout_val=-5;
   else
     vout_val=7;

Regards,

Andrew.

 Dear Andrew,

Thanks a lot for clarifying the Hidden State problem.

Kind Regards,

Hello, I'm also new with  Verilog A. I would like to run a pss in a circuit that has a block with only a veriloga view. It's a D flip-flop double edge. I wrote the veriloga code according to the advice in this post, but I still have a hidden state. 

Here's the code:

// Double edge Flip Flop

`include "constants.vams"

`include "disciplines.vams"

module DFF_DEDGE(q, clk, d);

 input clk,d;

 output q;

 voltage q, clk, d;

 parameter real tdelay   = 1n from [0:inf),

                ttransit = 20p from [0:inf),

                vout_high = 1,

                vout_low  = 0 from (-inf:vout_high),

                vth       = 0.5;

 integer x;

 analog

 begin

   @(initial_step) x = 0;

   @(cross(V(clk) - vth )) x = (V(d) > vth);

   V(q)    <+ transition( vout_high*x  + vout_low*!x, tdelay, ttransit );

 end

endmodule

If I run a PSS, I got the following error message

 ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DFF_DEDGE'.  Skipped.

  ... : Hidden state variable: x

How can I modify the code to avoid it?

Thanks a lot! 

See a good coverage of the problem in general in this paper on Hidden State in SpectreRF and also a hidden state free DFF model. In your case, the x variable is only updated on the crossing event, and so is clearly retaining the state of the flip flop from one iteration of the simulator to the next (which is fine normally, but not for SpectreRF as it can't see the hidden state, since it's not on a node).

The model I pointed you too uses a resetable integrator (reset on the clock edge) to achieve the same thing. This doesn't have any hidden states because the variables are updated on every timestep.

Regards,

Andrew.

Thanks a lot!

Based on the example you pointed me, I adapted my code and this is my newest code:

 // Double edge Flip Flop

`include "constants.vams"

`include "disciplines.vams"

module DFF_DEDGE_NOHIDDEN(q, clk, d);

 input clk,d;

 output q;

 voltage q, clk, d;

 parameter real tdelay   = 1n from [0:inf),

                ttransit = 20p from [0:inf),

                vout_high = 1,

                vout_low  = 0 from (-inf:vout_high),

                vth       = 0.5;

 parameter integer init_state=0 from [0:1];

 integer actNow, out, state;

 analog  begin

    actNow = 0;

    @(initial_step) begin

actNow = 1;

state = init_state;

    end

    @(cross(V(clk) - vth, +1) or cross(V(clk) - vth, -1)) begin

actNow = 1;

state = (V(d) > vth);

    end

    out = idt(0, state, actNow);

    V(q) <+ transition(out ? vout_high : vout_low, tdelay, ttransit);

 end

endmodule

But I still have hidden state problems:

"ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DFF_DEDGE_NOHIDDEN'.  Skipped.

... Hidden state variable: state " 

I've read the documentation you attached and I think that variable "state" is constantly updated. Am I missing something?

Thank you again for yuor precious help 

Hello, it seems I solved it: I added state=0 and now the pss run.

This is my last working code, maybe can be useful to someone. I put in bold the line I added to make it work:

// Double edge Flip Flop

`include "constants.vams"

`include "disciplines.vams"

module DFF_DEDGE_NOHIDDEN(q, clk, d);

 input clk,d;

 output q;

 voltage q, clk, d;

 parameter real tdelay   = 1n from [0:inf),

                ttransit = 20p from [0:inf),

                vout_high = 1,

                vout_low  = 0 from (-inf:vout_high),

                vth       = 0.5;

 parameter integer init_state=0 from [0:1];

 integer actNow, out, state;

 analog  begin

    actNow = 0;

   state=0; 

    @(initial_step) begin

actNow = 1;

state = init_state;

    end

    @(cross(V(clk) - vth, +1) or cross(V(clk) - vth, -1)) begin

actNow = 1;

state = (V(d) > vth);

    end

    out = idt(0, state, actNow);

    V(q) <+ transition(out ? vout_high : vout_low, tdelay, ttransit);

 end

endmodule

Thank you very much for your help 

Dear Andrew,

I am using AMS kit.

I have made circuit using schematic editor but while I am running PSS analysis, it is getting terminated with showing following error:

 ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'modn_ahdl'.  Skipped.

/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vgs_ot
/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vds_ot
/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vgb_ot
/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vdb_ot
/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vsb_ot
/root/cadence/ams/AMS_410_CDS/spectre/c35/soac/soac.va, declared in line 23: Hidden state variable: vbpsub_ot

The same message is appearing for PSS analysis for all circuits.

Thanks and Regards,

Kapil J.

Hi Kapil,

You will need to contact AMS. It's their model and presumably you shouldn't change it without their agreement or input. I can't advise you what to change because I've not seen the model (you can't post it here because it's AMS' IP).

Regards,

Andrew.