I am a beginner in verilogA .
I wrote a code but when I ran PSS it showed hidden state in the code and didn't run.
My behavioural model is as below:-
// VerilogA for VERILOG_A_MODEL, HARD_LIMIT_GM, veriloga`include "constants.vams"`include "disciplines.vams"module HARD_LIMIT_GM(in,out); inout in,out; parameter real vtrans = 0; parameter real tdelay = 0 from [0:inf); parameter real trise = 1p from (0:inf); parameter real tfall = 1p from (0:inf); parameter real Gm=-5m; electrical in,out; real vout_val; analog begin @ (cross(V(in) - vtrans, 1)) vout_val = 1; @ (cross(V(in) - vtrans, -1)) vout_val = 0; I(out) <+ Gm * transition( vout_val, tdelay, trise, tfall); end endmodule
Could anybody please tell how I can avoid the hidden state (vout_val ) ?
The reason you have a hidden state is because vout_val is not updated on every iteration. It's only set within the @cross blocks - and is held (and hence retains state) between cross events.
If you replace the two @cross statements with:
@ (cross(V(in) - vtrans)) ; vout_val = V(in)>vtrans;
Then it will do what you want. The first @cross will force there to be a timestep close to either the positive or negative transition - but doesn't have any action within the @cross itself. The second line is simply computing the vout_val based on whether V(in) is greater than vtrans - but does this at every timestep and hence is not a hidden state.
Thanks a lot for your reply. I have some doubts.
1:- Every iteration means:-
Is it each simulation time step ?
2:- Suppose instead of having vout_val= 1 or 0, If I want let's say vout_val= -5 ( for positive edge cross )or +7 ( for -ve edge cross ),
is there a way to achieve this ?
Thanks a lot for clarifying the Hidden State problem.
Hello, I'm also new with Verilog A. I would like to run a pss in a circuit that has a block with only a veriloga view. It's a D flip-flop double edge. I wrote the veriloga code according to the advice in this post, but I still have a hidden state.
Here's the code:
// Double edge Flip Flop
module DFF_DEDGE(q, clk, d);
voltage q, clk, d;
parameter real tdelay = 1n from [0:inf),
ttransit = 20p from [0:inf),
vout_high = 1,
vout_low = 0 from (-inf:vout_high),
vth = 0.5;
@(initial_step) x = 0;
@(cross(V(clk) - vth )) x = (V(d) > vth);
V(q) <+ transition( vout_high*x + vout_low*!x, tdelay, ttransit );
If I run a PSS, I got the following error message
ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DFF_DEDGE'. Skipped.
... : Hidden state variable: x
How can I modify the code to avoid it?
Thanks a lot!