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How to use MOSFET as a switch to introduce a capacitor into a LC tank in VCO?

Alex Liao
Alex Liao over 10 years ago

Hi guys,

In my VCO design, if I introduce a fixed capacitance, Cap_fix into the C tank, it works fine and give me the target frequency I want. If I disconnect this path (in parallel with the total C) to disable the introduction of this Cap_fix, it gives me higher frequency and it is reasonable as it follows:
w = 1/sqrt(C*L).

But if I want to implement this on/off feature using a MOSFET it does not work.
It always generates strange frequency. I was observing the target frequency through Cadence DFT function of the output in the ADE panel.

Working as a switch, I treated the D and S ends as the switch's two ends. I biased the MOSEFT in triode (ohmic) region, which means,
give me a small Ron (1/gds) when it is on and a infinite large Ron when it is off. For MOSFET size, I tried several combinations, still not working. Either the harmonic signal's strength is high or sometimes output some unreasonable DFT waveform.

Is it such tricky on just using a triode region MOSFET as a simple on/off switch in RF circuit? Or was I implementing the switch using MOSFET in a wrong way? or any tips on bias or sizing this MOSFET? Shouldn't be the reason of my core design as it works fine by simply connecting/disconnect a regular capacitor into the LC tank.

Any reply is appreciated!
Thanks,
Alex

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  • ShawnLogan
    ShawnLogan over 10 years ago

    Dear Alex,

    > Is it such tricky on just using a triode region MOSFET as a simple on/off switch in RF circuit?

    >  Shouldn't be the reason of my core design as it works fine by simply connecting/disconnect a regular capacitor into the LC tank.

    I am assuming you have placed the MOS device between the capacitor you want to introduce and the VCO. If so, most likely, the MOS switch you are introducing is not behaving in the ideal fashion you would like it to behave. There are many reasons for such behavior. A few are listed below.

    a. The added rds results in a lowering of the sustaining amplifier's negative resistance such that steady-state oscillation does not result

    b. The resulting large signal voltages on either side of the MOS device in oscillation result in the device exiting its ohmic region and impacting the amplifiers' negative resistance

    c. The MOS capacitances (Cgd/Cgs) are significant relative to the added capacitance and changing the VCO steady-state frequency relative to your desired target frequency.

    d. Leakage currents through the switch are impacting the bias points of your VCO devices

    To diagnose the issue, you might consider running a small-signal negative resistance analysis of your sustaining amplifier with both your ideal added capacitor and with the added capacitor in series with your MOS switch. This is done by replacing your inductive element with an AC current source, running a small signal AC analysis, and examining the real part of the voltage across your AC current source (which will be an impedance - resistance). This provides an estimate of the small signal negative resistance characteristic. The magnitude of the negative resistance must exceed the magnitude of the real part of your inductance at the desired frequency of oscillation to both ensure oscillator start-up and steady-state oscillation. If items [a] or [d] are significant issues, these effects will be evident when you compare the sustaining amplifier negative resistances for your ideal capacitor and your ideal capacitor in series with your MOS device.

    This same analysis can be performed to diagnose large signal issues as well, but it can be difficult to stabilize the DC operating point depending on your oscillator topology - which I do not know. Studying the large signal negative resistance can shed light on items [b] and [c]. However, insight can also be obtained just by examining the transient waveform of your entire VCO (not just the FFT of its output as you note).

    You might also examine the real and imaginary impedance of your MOS switch and ideal capacitor (as a separate circuit) using large and small signal simulations to verify the switch impedance is not siginficant relative to the impedances of your ideal capacitor.

    I hope these suggestions make sense and provide some thoughts...

    Shawn

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  • ShawnLogan
    ShawnLogan over 10 years ago

    Dear Alex,

    > Is it such tricky on just using a triode region MOSFET as a simple on/off switch in RF circuit?

    >  Shouldn't be the reason of my core design as it works fine by simply connecting/disconnect a regular capacitor into the LC tank.

    I am assuming you have placed the MOS device between the capacitor you want to introduce and the VCO. If so, most likely, the MOS switch you are introducing is not behaving in the ideal fashion you would like it to behave. There are many reasons for such behavior. A few are listed below.

    a. The added rds results in a lowering of the sustaining amplifier's negative resistance such that steady-state oscillation does not result

    b. The resulting large signal voltages on either side of the MOS device in oscillation result in the device exiting its ohmic region and impacting the amplifiers' negative resistance

    c. The MOS capacitances (Cgd/Cgs) are significant relative to the added capacitance and changing the VCO steady-state frequency relative to your desired target frequency.

    d. Leakage currents through the switch are impacting the bias points of your VCO devices

    To diagnose the issue, you might consider running a small-signal negative resistance analysis of your sustaining amplifier with both your ideal added capacitor and with the added capacitor in series with your MOS switch. This is done by replacing your inductive element with an AC current source, running a small signal AC analysis, and examining the real part of the voltage across your AC current source (which will be an impedance - resistance). This provides an estimate of the small signal negative resistance characteristic. The magnitude of the negative resistance must exceed the magnitude of the real part of your inductance at the desired frequency of oscillation to both ensure oscillator start-up and steady-state oscillation. If items [a] or [d] are significant issues, these effects will be evident when you compare the sustaining amplifier negative resistances for your ideal capacitor and your ideal capacitor in series with your MOS device.

    This same analysis can be performed to diagnose large signal issues as well, but it can be difficult to stabilize the DC operating point depending on your oscillator topology - which I do not know. Studying the large signal negative resistance can shed light on items [b] and [c]. However, insight can also be obtained just by examining the transient waveform of your entire VCO (not just the FFT of its output as you note).

    You might also examine the real and imaginary impedance of your MOS switch and ideal capacitor (as a separate circuit) using large and small signal simulations to verify the switch impedance is not siginficant relative to the impedances of your ideal capacitor.

    I hope these suggestions make sense and provide some thoughts...

    Shawn

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