How to use MOSFET as a switch to introduce a capacitor into a LC tank in VCO?

Dear Alex,

> Is it such tricky on just using a triode region MOSFET as a simple on/off switch in RF circuit?

>  Shouldn't be the reason of my core design as it works fine by simply connecting/disconnect a regular capacitor into the LC tank.

I am assuming you have placed the MOS device between the capacitor you want to introduce and the VCO. If so, most likely, the MOS switch you are introducing is not behaving in the ideal fashion you would like it to behave. There are many reasons for such behavior. A few are listed below.

a. The added rds results in a lowering of the sustaining amplifier's negative resistance such that steady-state oscillation does not result

b. The resulting large signal voltages on either side of the MOS device in oscillation result in the device exiting its ohmic region and impacting the amplifiers' negative resistance

c. The MOS capacitances (Cgd/Cgs) are significant relative to the added capacitance and changing the VCO steady-state frequency relative to your desired target frequency.

d. Leakage currents through the switch are impacting the bias points of your VCO devices

To diagnose the issue, you might consider running a small-signal negative resistance analysis of your sustaining amplifier with both your ideal added capacitor and with the added capacitor in series with your MOS switch. This is done by replacing your inductive element with an AC current source, running a small signal AC analysis, and examining the real part of the voltage across your AC current source (which will be an impedance - resistance). This provides an estimate of the small signal negative resistance characteristic. The magnitude of the negative resistance must exceed the magnitude of the real part of your inductance at the desired frequency of oscillation to both ensure oscillator start-up and steady-state oscillation. If items [a] or [d] are significant issues, these effects will be evident when you compare the sustaining amplifier negative resistances for your ideal capacitor and your ideal capacitor in series with your MOS device.

This same analysis can be performed to diagnose large signal issues as well, but it can be difficult to stabilize the DC operating point depending on your oscillator topology - which I do not know. Studying the large signal negative resistance can shed light on items [b] and [c]. However, insight can also be obtained just by examining the transient waveform of your entire VCO (not just the FFT of its output as you note).

You might also examine the real and imaginary impedance of your MOS switch and ideal capacitor (as a separate circuit) using large and small signal simulations to verify the switch impedance is not siginficant relative to the impedances of your ideal capacitor.

I hope these suggestions make sense and provide some thoughts...

Shawn

I have looked at different things that mentioned by your reply. The most important of all is the how the MOSFET works as a switch in large signal case. As it is known that if it is properly biased, the working state will not vary in the small signal analysis like applications in amplifier. But in the VCO, the D and S ends are in the large signal situation as you mentioned in (b). It cannot work steadily in one region. (This knowledge is gained by the point that looking at the AC output of different nets/ends in the circuit by you.) If you can refer to the schematic that would be very helpful to understand. http://www.edaboard.com/attachments/117951d1432864293-vco.png The main parameters as described as follows: My target Frequency is 5GHz. L = 1.33nH. The total C vary from 30pF +/- 600fF depending on the introduction of different paths which has parallel connection with Capacitance. The MOSFETs as switch work at this part and thus the D and S ends are connected one at the Vout_negative and the other is connected with the capacitance (or the capacitor device). After passing through the capacitor the Vout_positive is connected to it. Several path can be introduced in parallel to increase or make a combination of the C_equivalent. The total voltage is supplied by a Vpulse, 0V @ 0ns, 1.2V after 1ns. The total I_bias is 2.2mA.

I have noticed that the AC current drop on the ideal switch is almost 0, but on the MOSFET device, Vds_AC drops a lot. This makes fewer AC voltage drop on desired capacitance I wanted to introduce on the specific path. The AC voltage between the Vout_N and Vout_P is around 3V to 550mV in the ideal case for the 5G desired target frequency. But in the MOSFET_switch case, if this voltage is applied into the path (one MOSFET (under 1.2 V supply or bias) + one capacitor), the MOSEFT cannot only working in a stable region.

This probably the biggest problem not appearing in the low frequency domain or small signal application.
Therefore I would think of on how to use MOSFET as a switch in the large signal case providing not over supplying 1.2V for 90nm technology.
Or any direction on which knowledge is suitable for desiring such a large signal MOSFET switch which is also Resistance and Capacitance sensitive one?

Switch capacitor might be a good topic but I do not think the circuit need extra knowledge on how to clock it. Isn't it?

Dear Shawn,

I was intended to make my reply more sensible, but I couldn't find the 'edit my reply' function. So I am adding something what I wanted to say here in a more sensible way.

1. For the (a) and (b) they are almost the same concern. For the (c) and (d) if my question on how to make MOSFET work stably in large signal case get solved, then they can be more reasonable to think of as they are mostly related to the accuracy problem if I am right on this.Now it seems the first two concern should be addressed. For (a) I am not sure if the negative resistance of the  sustaining amplifier refers to the M1 and M2 paris or other structures from other implementations. But is the 'negative resistance' refers to the gm or gds or might be gm || gds that controls the amplification of a signal? otherwise what does it mean? 

2. Can the transient analysis operating point (TA-OP) help by running transient analysis? I always use it in diagnose problems in high frequency domain. It can print out a list of parameters. But I do not know how the Cadence get those information. Transient is run on a specific time range, the results must correspond to a sampling time. Are the printed TA-OP information revealing the simulation of the last sampling time or it always returns a average value?　Should not be the later case, as the TA-OP list includes the region of Mosfet, which is 0,1,2,3,4 for different meaning. This information cannot be averaged. Right?

Sorry if I am asking irrelevant question here if it has nothing to do with diagnose problems.

Thanks,

Alex

Dear Alex,

I was unable to view your schematic. Perhaps you can upload it the Cadence site. It also looks as if you have posted the same question to that forum.

In any case, it sounds as if your oscillation amplitude is not well controlled as it can vary from 3 to 550 mV. If your nominal supply voltage is 1.20 V, will not the 3.3V amplitude lead to a reliability issue? In order to use an MOS switch, you need to be able to quantify the maximum and minimum voltages applied to the side of the MOS switch exposed to the oscillator in order to verify the MOS switch stays in its desired region of operation for the specific gate voltage.

Perhaps I need to see your circuit to provide a more complete response to your questions. Sorry!

Shawn

Alex Liao said:

2. Can the transient analysis operating point (TA-OP) help by running transient analysis? I always use it in diagnose problems in high frequency domain. It can print out a list of parameters. But I do not know how the Cadence get those information. Transient is run on a specific time range, the results must correspond to a sampling time. Are the printed TA-OP information revealing the simulation of the last sampling time or it always returns a average value?　Should not be the later case, as the TA-OP list includes the region of Mosfet, which is 0,1,2,3,4 for different meaning. This information cannot be averaged. Right?

Alex,

If you use the "infotimes" parameter of the tran analysis to save the operating point at a list of times (what you call "TA-OP", which is a term I've never heard anyone use before!) then you get the operating point at those times - it's not averaged. I'm not sure why you would think it was averaged - you get an output at each and every time you ask to save at.

Regards,

Andrew.

Hi Shawn,

I have uploaded it on another site and double checked it is available.

http://postimg.org/image/i5tuclda3  (Suggest to view it in my later reply, which gives the picture within this forum)

smlogan said:

 It also looks as if you have posted the same question to that forum.

Yes, that site is also popular and some people there may not join in the Cadence forum here thus more people can share their knowledge and learn things from each other. This might be also help to speed up the problem solving. And people did give suggestions from different perspectives.

smlogan said:

In any case, it sounds as if your oscillation amplitude is not well controlled as it can vary from 3 to 550 mV. If your nominal supply voltage is 1.20 V, will not the 3.3V amplitude lead to a reliability issue?

Anyway, I have double checked the output of the ideal case, which was from a previous student's project. The output is uploaded here as follows:

http://postimg.org/image/hs9nk0xct/ (Suggest to view it in my later reply, which gives the picture within this forum)

There are three plots. The first one is for the phase Noise, the second one is for the DFT transformed waveform of the output, the last one is the real transient output for the positive end. It shows that the voltage varies from what I mentioned 3V to negative 550mV. The vPulse is indeed 1.2 V. Is there any wrong for the ideal case's output and/ or the design?

Thanks,

Alex

B.T.W, if you zoom in a bit, those uploaded pictures are more clear.

Alex, when using the rich formatting on this forum, you can use the Insert/Edit Media icons to upload pictures. That way I don't have to follow your links to a site outside of the community forums and so don't have to get pictures of Asian ladies along with your graphs.

Andrew.

Andrew,

Sorry I did not realized that as some people may also get uncomfortable seeing unwanted things. Thanks for pointing out this function. It looks that the thread reply system has changed a little bit. I just found the edit post under 'More'.

Please disregard the previous two links if anybody is reviewing this case. 

Thanks,

Alex

Hi Andrew,

Andrew Beckett said:

If you use the "infotimes" parameter of the tran analysis to save the operating point at a list of times (what you call "TA-OP", which is a term I've never heard anyone use before!) then you get the operating point at those times - it's not averaged. I'm not sure why you would think it was averaged - you get an output at each and every time you ask to save at.

I have practiced the infotimes option and did get different OPs.  Thanks for your reply. The reason why I think it is averaged is because even though I did not set this 'infotimes', I can still print the transient operating point and no time information is shown. This must corresponds to a time, most likely the end time of the tran analysis. But it did not say this is for the end time Op info. or give a warning saying something like 'Since you did not specify the time, the system will return you the information of the last sampling time which is the end time by default". That's why I think this OP info. is for a specific case (or incorrectly, average case) for tran analysis. Thus I strangely call it "TA-OP". Maybe the spectre or Cadence manual has everything but at the first glance nobody gets it. Most people trying new things and only gets stuck and then resort to the Manual. It is suggested to prompt some information or warning on improper operations for people who are not the experts of Cadence tools.

Thanks,

Alex