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How to use MOSFET as a switch to introduce a capacitor into a LC tank in VCO?

Alex Liao

Hi guys,

In my VCO design, if I introduce a fixed capacitance, Cap_fix into the C tank, it works fine and give me the target frequency I want. If I disconnect this path (in parallel with the total C) to disable the introduction of this Cap_fix, it gives me higher frequency and it is reasonable as it follows：
w = 1/sqrt(C*L).

But if I want to implement this on/off feature using a MOSFET it does not work.
It always generates strange frequency. I was observing the target frequency through Cadence DFT function of the output in the ADE panel.

Working as a switch, I treated the D and S ends as the switch's two ends. I biased the MOSEFT in triode (ohmic) region, which means,
give me a small Ron (1/gds) when it is on and a infinite large Ron when it is off. For MOSFET size, I tried several combinations, still not working. Either the harmonic signal's strength is high or sometimes output some unreasonable DFT waveform.

Is it such tricky on just using a triode region MOSFET as a simple on/off switch in RF circuit? Or was I implementing the switch using MOSFET in a wrong way? or any tips on bias or sizing this MOSFET? Shouldn't be the reason of my core design as it works fine by simply connecting/disconnect a regular capacitor into the LC tank.

Any reply is appreciated!
Thanks,
Alex

Parents

  • Hi Shawn,

    I have uploaded it on another site and double checked it is available.

    http://postimg.org/image/i5tuclda3  (Suggest to view it in my later reply, which gives the picture within this forum)

    smlogan said:

     It also looks as if you have posted the same question to that forum.

    Yes, that site is also popular and some people there may not join in the Cadence forum here thus more people can share their knowledge and learn things from each other. This might be also help to speed up the problem solving. And people did give suggestions from different perspectives.

    smlogan said:

    In any case, it sounds as if your oscillation amplitude is not well controlled as it can vary from 3 to 550 mV. If your nominal supply voltage is 1.20 V, will not the 3.3V amplitude lead to a reliability issue?

    Anyway, I have double checked the output of the ideal case, which was from a previous student's project. The output is uploaded here as follows:

    http://postimg.org/image/hs9nk0xct/ (Suggest to view it in my later reply, which gives the picture within this forum)

    There are three plots. The first one is for the phase Noise, the second one is for the DFT transformed waveform of the output, the last one is the real transient output for the positive end. It shows that the voltage varies from what I mentioned 3V to negative 550mV. The vPulse is indeed 1.2 V. Is there any wrong for the ideal case's output and/ or the design?

    Thanks,

    Alex

Reply

  • Hi Shawn,

    I have uploaded it on another site and double checked it is available.

    http://postimg.org/image/i5tuclda3  (Suggest to view it in my later reply, which gives the picture within this forum)

    smlogan said:

     It also looks as if you have posted the same question to that forum.

    Yes, that site is also popular and some people there may not join in the Cadence forum here thus more people can share their knowledge and learn things from each other. This might be also help to speed up the problem solving. And people did give suggestions from different perspectives.

    smlogan said:

    In any case, it sounds as if your oscillation amplitude is not well controlled as it can vary from 3 to 550 mV. If your nominal supply voltage is 1.20 V, will not the 3.3V amplitude lead to a reliability issue?

    Anyway, I have double checked the output of the ideal case, which was from a previous student's project. The output is uploaded here as follows:

    http://postimg.org/image/hs9nk0xct/ (Suggest to view it in my later reply, which gives the picture within this forum)

    There are three plots. The first one is for the phase Noise, the second one is for the DFT transformed waveform of the output, the last one is the real transient output for the positive end. It shows that the voltage varies from what I mentioned 3V to negative 550mV. The vPulse is indeed 1.2 V. Is there any wrong for the ideal case's output and/ or the design?

    Thanks,

    Alex

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