Phase Noise Setup doesn't work in port/vsource

First of all, which spectre version are you using? Also, which IC version?

Secondly, you probably should be doing the pnoise as a relative sweep around the 1st harmonic, so that 10->1M would cover the range in your SSB description of the phase noise. When I do this, I get exactly the right shape. I'm using SPECTRE161 together with IC617 (recent hotfixes of both).

Finally, the noise temperature has no meaning for vsource (only for port) because there's no impedance in the port. I'll be filing a CCR to have that removed from the vsource in analogLib because it makes no sense (you get a warning from spectre telling you that it's an invalid parameter).

Regards,

Andrew.

Thank you very much Andrew! It is indeed the problem with pnoise "freq sweep", and when I set it to "relative" I got the correct result as yours.

However, now I'm confused with 2 things:

1. Even if I didn't use "relative", shouldn't I still get a result with a double-side-band-shape overshoot around 100MHz when I plot Phase Noise? Why in my previous posted result(10Hz to 1GHz), there's no such skirt around 100MHz?

2. How should I set up pnoise if I want to simulate a PLL frequency synthesizer? E.g. a PLL with 100MHz input and 1GHz output. The beat frequency will be 100MHz, but pnoise/output will be set to 1GHz output nodes. If use "relative freq sweep" for 1st harmonic, this "1st harmonic" is 100MHz, while actually I'd like to get the SSB spectrum around 1GHz when I plot Phase Noise. Should I use "relative sweep at 10th harmonic" in this case?

Thanks again!

1. I don't know. I do get a peak - so that's why I asked which version you're using. The version I'm simulating with is using a newer method for separating out the PM component of the noise - but not sure whether that's relevant here.
2. Yes, that's right - assuming you are able to get it to simulate OK. I'd suggest using IC617 together with SPECTRE161 though because the handling of phase noise is much clearer (it's much clearer what you're simulating, and much clearer what the results mean - you explicitly say whether you want SSB or DSB results, etc).

Andrew

Thanks a lot Andrew! I'm using Virtuoso 6.1.6 and MMSIM/spectre 13.1

Now I found a very weird thing:

Since I'm designing and simulating a PLL now, I was using an ideal VCO (verilog-A), and pss can converge and give result.

But when I changed it to be transistor-level real VCO, even though pss can converge, I found the pss gives wrong result:

1. "Direct Plot -> pss -> voltage -> time" for VCO output node is not oscillating (red plot below), the DC value of it indeed should be 0.5V;

2. I have confirmed with transient simulation that it can oscillate, and the whole PLL loop can lock;

3. "Direct Plot -> tstab -> PSS Transient V" for VCO output node is correct and consistent with transient simulation result. (You can see the DC level is 0.5V, and it has a start up time around 2.5ns)

The weird thing is that the pss can even converge while @20ns the PLL loop is not locked yet (can be verified in transient.)

And I guess the pss result previously with ideal VCO is also wrong.

My PLL is a 100MHz input, 40.5GHz output one. I'm using the previously mentioned 100MHz sine PORT as input.

Here's my setup for pss:

My questions is:

1. Why pss/voltage/time for VCO output is like that? Is there anything wrong with my setup? Why it's not consistent with transient sim result?

2. Since I give a tstab in pss setup, when plotting pss/voltage/time, should the x-axis be from tstab(or the stable moment when convergence happens) to tstab+beat_period, instead of 0 to beat_period?

This is very hard to diagnose without seeing the circuit and setup in more detail, but I will make these points:

1. Your tstab is very short. It will simulate to the onset of periodicity (maybe you have some startup sources which take ~5ns before they become periodic?) plus the tstab plus one cycle of the fundamental. You're effectively only including just over 3 cycles of the input frequency. Your tstab really needs to be long enough for the PLL to have locked - I think it's unlikely to have locked in 3 cycles of the input frequency. If it's not locked, the circuit is not periodic but the shooting method can get confused because the circuit has a strongly nonlinear response to the initial conditions and so it's hard for the shooting algorithm to be able to predict what it needs to change for the circuit to be periodic.
2. Not sure what type of oscillator you have, but it must be pretty sinusoidal if 410 harmonics is enough to cover the spectral content of the oscillator (since the VCO output is at the 405th harmonic of the input frequency). You may need more harmonics to force more time steps in the VCO to make it more likely to continue oscillating.
3. It's very hard for PSS to converge with such high divide ratios - you certainly need longer tstab. What appears to have happened is that the shooting algorithm has caused the oscillator to die out - probably because it was not stable enough in the first place.

This would be better dealt with via customer support because then hopefully you can share the circuit.

Regards,

Andrew.

Thank you Andrew!
Actually I initially tried 300ns tstab, which is long enough to lock the loop (verified by transient sim), but pss/voltage/time gave bad result as mentioned (not oscillating).
After that I just wanna see whether pss went weird, that's why I changed to 20ns tstab, which I knew the loop won't locked and pss should not converge. However, it can still converge......
I'm using a simple cross-couple NMOS-pair LC oscillator, which outputs sine wave with some distortion.

After your reply, I tried setting pss "No. of Harmonic" to 1640. But it still gave the same result. I also tried running transient to 300ns first, then running pss with "transient's .fc file" as initial condition (ic: all), and setting pss tstart to be 300ns. However, pss/voltage/time of VCO output is still the previous wrong result, a "white noise shape plot" around 0.5V........Then I'm just really confused. I think at least it should be an oscillating plot, because I've given the transient final condition to the pss, in which the VCO is oscillating.

Another thing I tried is using verilog-A VCO with tstab=300ns, and pss seems to work good with it. When I plot pss/voltage/time for VCO output and control voltage, they all seem correct (control voltage indicates lock state). So it seems pss doesn't like my transistor-level VCO, although transient can get along with it :(

Just to make sure:
If I set pss/tsart to 300ns, or I set pss/tstab to 300ns, with a beat period of 10ns, when I plot pss/voltage/time, should the x-axis be from 300ns to 300ns+10ns? Or from 0 to 10ns? I though it should be a one period plot after achieving static state, which is from 300ns to 300ns+10ns. But it always plot from 0.

Thanks

Hi Andrew, I have to bother for another question:

After doing pnoise, I'd like to see the noise summary for phase noise. I can do Results/Print/Noise_Summary, but the noise unit is V or V^2. (As shown below in the picture)

Although in the first line of "Noise Summary" window it shows "Print the output of 'pnoise' analysis", but I guess it's still a voltage domain noise summary (like the one in "noise" simulation).

How can I know/print the phase noise contribution then?

Use at least MMSIM15.1 (or SPECTRE16.1) together with IC617 (I think at least ISR1). You'll then be able to access the new improved, simplified pnoise capability which is much clear (it's clear before simulation what you're asking for and clearer precisely what type of phase noise you're plotting after simulation). On the pnoise form you'll see:

and then on the noise summary form you'll see:

You can then pick pnoise_pm at the top (provided you picked one of the "PM" options on the time average setup during simulation). The numbers are still in V^2/Hz but you're only looking at the phase modulated part of the noise output.

Regards,

Andrew

Got it. Thanks. It seems 6.1.7  is much better.