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high frequency D flip flop for phase detector

yefJ

Hello, i have succeeded to implement a phase detector using modification of xor logic circuit. how ever the more popular implementation is using D FLIP FLOP shown bellow.

I have read many articles  explaining the principle and i understand it well, but the simulation always goes bad.

is there some example in the cadence website of D flip flops full simulation? not necessary 5Ghz  ,some thing modest i could learn from?

Thank

Parents

  • I'm not aware of there being any specific examples for something as simple as this. I cannot see any good reason why you should have any difficulty simulating such a circuit. It might have problems with reaching a metastable state, but I don't know what you mean by "goes bad". Perhaps you should talk to your supervisor?

    Regards,

    Andrew.

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  • I'm not aware of there being any specific examples for something as simple as this. I cannot see any good reason why you should have any difficulty simulating such a circuit. It might have problems with reaching a metastable state, but I don't know what you mean by "goes bad". Perhaps you should talk to your supervisor?

    Regards,

    Andrew.

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