sampled pnoise on multi-phase switched cap circuit

Dear jfryan,

jfyan said:

the following is the simple circuit I try to sim. the noise using pnoise.

if RC << Ton, KT/C noise will be on the output, and noise density is sqrt (KT/C*2/fund), if you run pss, and pnoise. fund = fs 

 but, if you look at the circuit, the noise should be updated at 2fs = 2fund, so the noise density should be the same as the case where the sampling clock is 2fs.

Your question regarding the noise density being "doubled" when there are two parallel switches with non-overlapping control signals relative to the case with a single switch puzzled me. I did not expect this intuitively when I studied your circuit topology. Hence, as my time allowed over the past week or so, I performed a number transient noise simulations using a circuit that I believe represents the circuit topology you illustrated in your most recent post Jeff. Perhaps I have not captured it correctly - and my sincere apologies if I did not!!

I conducted a number of experiments to examine the resulting integrated noise on the load capacitor node - as well as the noise on the node prior to the switches adjacent the noisy resistor. I varied combinations of the following:

1. Switch type: no switches enabled (i.e.., direct connection between resistor and load capacitor), single switch enabled, two parallel switches enabled with non-overlapping control signals

2. Fixed 1K noisy resistor with load capacitances of 1 pf, 10 pf, and 100 pf corresponding to bandwidths of much greater than the switches operating frequency of 10 MHz, close to the sampling frequency, and far less than the sampling frequency

3. Number of dft points used in the subsequent analysis of the transient noise simulation data using the single switch circuit topology to determine the required number of points to provide sufficient accuracy of the integrated transient noise voltage

I compared the resulting integrated noise for the "no switch" case (i.e., direct connection between resistor and load capacitor)  to that provided by the theoretical value for the corresponding noise bandwidth and found the two values correlate well.

The analyses indicate that for the case where the -3 dB bandwidth of the lowpass filter formed by the noisy 1 K resistor and the load capacitor is far less than the sampling frequency divided by two, the use of two parallel switches provides an integrated noise equivalent to the integrated voltage noise for a single switch circuit topology. This result seems to differ from your expectations, but does tend to be consistent with my initial intuition. Once again, Jeff, perhaps my assumptions about your circuit topologies or your fundamental intentions are incorrect. However, I did want to follow up with you with my experiments and observations. If you have the patience, and this is still of interest to you, I did place a Portable Document Formatted file detailing my test bench (basically your switch topologies and resistor/load capacitor), motivation, graphical and tabular summaries of the simulation data (Fourier analyses of voltage noise of both circuit nodes) and my conclusions at URL:

ent.box.com/.../epe7cskp6habzk4yrt2nc945q95iwn3a

The URL will expire at the end of 2021. If you do care to review it and have any thoughts, comments, or observations you wish to share, please feel free! If it is no longer of interest or your time does not allow, that is absolutely fine too!

Shawn

hi Shawn,

thank you a lot for your time and help here.

I don't I presented my question very well. what I want to ask is how to simulate a switched cap circuit with multiphase clocks. 

one example is I shown previously, in which the output noise is updated at 2*fund, so the noise from the input should be the same with one switch running at fs = 2fund. using pss+pnoise can't directly give me an answer. so sampleratio might be an option here. 

another method is transient noise simulation that I think you're trying to do in your doc.

page 29 and page 32 looks answer my question, what I care is the noise density for this two cases, I think, on page 29, the double side noise density from the calculation should be sqrt(kT/C/10MHz), while on page 32, the double side noise density be sqrt(kT/C/20MHz). i don't understand what is vres_sampled rms voltage noise =47.6 uV/root Hz? or just 47.6uV for rms noise ?

thanks again

jeff 

Dear jfryan

jfyan said:

i don't understand what is vres_sampled rms voltage noise =47.6 uV/root Hz? or just 47.6uV for rms noise ?

As shown in Figure 1 from page 6 (the test bench), vres_sampled is the net at the output of the two switches. I included simulation cases where both switches were closed for the entire duration (i.e., no sampling occurs), one switch is active at a 10 MHz rate with a 25% duty cycle during which the switch is closed (see example waveforms on page 9) and the two parallel switches are both active each with non-overlapping duty cycles of 25% (example waveforms on page 10). 

Since this is a sampled system at 10 MHz when the switches are operating, the noise is only worth evaluating over 1/2 the switching frequency of 10 MHz or 5 MHz. Hence, I integrated the noise between 100 kHz and 5 MHz to determine the integrated voltage noise in uV for many cases. For the cases where the load capacitor is 100 pf (the only case where the RC -3 dB frequency is much less than the Nyquist frequency of 5 MHz and hence the aliasing is minimal), whether there are no switches active, one switch active or two switches active, the integrated noise is about the same (see the tabular summary on page 35).

I hope this clarifies some answers to your questions....In summary, I don't believe the noise density is difference between the case where one switch only is active or if two parallel switches are active based on these transient noise simulation results. It sounds as if you still don't agree.

Shawn

Figure 1

(from page 6 of URL: ent.box.com/.../epe7cskp6habzk4yrt2nc945q95iwn3a

hi Shawn,

thanks.

so, what is DFT plot, is it noise density or noise power over freq?

I'm keeping asking about the noise density difference between the two cases, not noise power. noise power is always KT/C :)

Regards,

Jeff 

Dear jfryan,

jfyan said:

so, what is DFT plot, is it noise density or noise power over freq?

As shown on their y-axes, the units are V^2/Hz, the square of V/root Hz and hence i must integrate the curves over a specific bandwidth to obtain the noise voltage in uV over a specific bandwidth. Hence, they represent a density.

jfyan said:

I'm keeping asking about the noise density difference between the two cases, not noise power. noise power is always KT/C :)

Please note that the ONLY case for which the noise results of a sampled system are valid are those for which the signal bandwidth is far less than the Nyquist frequency. In other cases, the noise includes aliased noise. In this example, this corresponds to the load capacitor of 100 pF and not 10 pF nor 1 pF.

In each case, whether there be no switch activity, a single switch active or twp switches active, the RC bandwidth of the network for a load capacitor of 100 pf is the same. Hence, the noise is expected to be the same independent of the number of switches.

Please study the Fourier components of the sampled noise voltages I duplicated from pages 27, 31, and 34 of the note  (node vres_sampled - the green curves for each case). The noise "density" is fixed by the bandwidth and totally independent of the number of switches. I hope this helps!

Shawn

pg_27_31_34.pdf

hi Shawn,

I am much more care the noise density when load cap is 1pF for one switch vs. two switches. 

can you explain more on the results on page 29 and 32? why there looks 2x difference in noise density? and total integrated noise are different too?

i suppose they should be same on noise density and noise power since your DFT data captured at fs=10Mhz for both cases. although for the 2nd two switches case, the effective sampling clock is 20Mhz.

thanks

jeff 

Dear jeff,

jfyan said:

I am much more care the noise density when load cap is 1pF for one switch vs. two switches. 

In this case, your output noise will be subject to aliasing since the RC bandwidth is far greater than 5 MHz. The aliasing will produce noise frequencies that are non-linear in nature. and will NOT behave as KT/C noise.

jfyan said:

if RC << Ton, KT/C noise will be on the output, and noise density is sqrt (KT/C*2/fund)

and then you state:

jfyan said:

how can  I simulate the circuit to get the right noise density (4kTR*pi/2*f3db/fs), instead of 4kTR*pi/2*f3db*2/fs? is pnoise option "sampleratio"

It is not clear to me that the noise density can be assumed to be linear with number of switches in parallel - aliasing is a non-linear process. When I read these comments in your prior posts, this was why I have a feeling your basic assumption is incorrect.

jfyan said:

can you explain more on the results on page 29 and 32? why there looks 2x difference in noise density? and total integrated noise are different too?

I have attached these two pages for your convenience as Figure 2. Focusing on the green curves which are the Fourier components of the sampled node (vres_sampled), the behavior of the two data sets as a function of frequency are fundamentally different with the difference being due to the effects of aliasing since the -3 dB bandwidth of your low-pass filter in this case is:

ff-3 = 1/(2*pi*1K*1 pf) = 159.2 MHz (RC = 1e-09)

and the sampling frequency is only 10 MHz (Ton = 1/10MHz = 1e-07)

The vres_sampled output noise, when integrated between 100 kHz and the Nyquist frequency of 5 MHz, for the single switch case is shown as 47.6 uV while that for the case with two switches in paralllel (but whose control signals are non-overlapping) is observed to be 26.2 uV.  The difference between the two integrated noise voltages is not exactly a factor of 2 as is, to my understanding, your basic assumption Jeff

I also summarized the integrated noise voltage in a table for each load capacitor and switch type on page 35 of the note which I include as Figure 3.

Shawn

Figure 2

Pages 29 and 32 of URL: https://ent.box.com/s/epe7cskp6habzk4yrt2nc945q95iwn3a

p29_p32.pdf

Figure 3

Page 35 of URL: https://ent.box.com/s/epe7cskp6habzk4yrt2nc945q95iwn3a

Hi Shawn,

although I do not agree with what you posted, I am very thankful to you for your help.

regards

Jeff

Dear Jeff,

jfyan said:

although I do not agree with what you posted, I am very thankful to you for your help.

I understand and will, of course, always allow for your disagreement with my thoughts and conclusions! I have been humbled so many times in the past, and fully expect to be in the future. I appreciate you just studying my comments and your added questions! Good luck with your simulation efforts!

Shawn