RE : calculating the output power of a Quartz oscillator

Why would you use PSS and then use the time-domain waveform? Wouldn't it make more sense to use the frequency-domain output - that's complex after all?

Also, for a crystal oscillator, you might also want to consider using harmonic balance (unless the output is very square).

Regards,

Andrew

I was using time-domain due to lack of experience and we were concerned about the output jitter. I will investigate further tomorrow.

Dear david j james,

david j james said:

I am designing a Crystal Oscillator ( which is a complex load) and trying to calculate Output power (to avoid over loading the crystal). I am using pss to simulate it and I get a tran waveform.

The power is complex so it is not easy to calculate. For example in a transient simulation phase information isn't readily available.

When I create calculations in calculator tool  get several different answers, and I am not sure which to trust

How should I calculate the output power?

What is the 'recommended' method?

I am not sure if you are aware of it, but computing the power dissipation of a quartz resonator contained in a quartz crystal unit is not straightforward as there are a number of subtleties. I apologize if I you are aware of these, but thought I should at least mention the topic.

You might consider the information in the article "Bulkwave Quartz Crystal Unit Power Dissipation in an Oscillator Environment" at URL:

www.electronicproducts.com/power-dissipation-of-bulkwave-quartz-xtal-units/

as you work on your simulation plan. The parasitic and actual load capacitances, the input capacitance of your sustaining amplifier (ad any package parasitics), and the Co/C1 ratio of your quartz crystal unit are needed to determine the power dissipation. There is an Microsoft Excel workbook that prompts for input parameters and plots the power dissipation of the quartz crystal unit as well as its real and imaginary input impedances if you are interested at URL:

www.dropbox.com/s/ao6vypu24nou8e3/xtal_z_pwr_072421v1p0.xlsx?dl=0

Shawn

In your excel it talks about 'Input Capacitance'. Is this from the amplifier only, or should it include the CL as defined in your paper?

Dear david j james,

david j james said:

In your excel it talks about 'Input Capacitance'. Is this from the amplifier only, or should it include the CL as defined in your paper?

The term "Input Capacitance" in the Microsoft Excel workbook includes both the sustaining amplifier's input capacitance and the combined value of the external capacitances (CL). Basically, it is the total effective capacitance seen by the terminals of the quartz crystal unit. It does not include the C0 of the quartz resonator within the quartz crystal unit nor any capacitances included within the quartz crystal unit as associated with its package.

Let me know if my explanation is not clear david j james!

Shawn

Question : why does increasing capacitance increase the Power Dissipation inside the crystal? It seems to me that larger caps will increase the load on the amplifier, but I do not see why it increases the power dissipated inside the crystal.

Dear david j james,

david j james said:

Question : why does increasing capacitance increase the Power Dissipation inside the crystal? 

A good question and one commonly asked an so I am glad mentioned it.! I am not sure of the quartz crystal unit parameters you are simulating with, but it is common for a 10 MHz  to roughly 100 MHz AT cut quartz crystal unit to exhibit that behavior. Intuitively, as the effective capacitance across the quart crystal unit becomes larger, its reactive impedance becomes smaller in magnitude (albeit a negative number). Since for steady-state oscillation, the sum of both the real and imaginary impedance of the sustaining amplifier and the real and imaginary impedance of the quartz crystal unit must be zero, this means its inductive impedance must also become smaller. This means the oscillation frequency will approach the series resonant frequency of the quartz crystal unit where its real impedance is a minimum. Therefore, the current flowing through the quartz crystal unit's real impedance is increased. With a real impedance of sometimes less than 10 ohms and any reasonable sustaining voltage across it of, say 0.50 Vpp, the power dissipation of the quartz crystal unit can be very significant. This is also why if an oscillator frequency is designed to operate close to its series resonant frequency its power dissipation is a factor that must be seriously considered.

In effect, at series resonance, the impedance of the quartz crystal unit is totally real and hence is a minimum. I've illustrated the operating point on a quart crystal unit for two cases -  an input capacitance of 5 pf  on page 1 and an input capacitance of 20 pf on page 2 of the attached Portable Document Formatted file. Note that as the input capacitance increases, the operating frequency moves closer to series resonance of the quart crystal unit and its power dissipation increases.

I hope my explanation makes some sense, but let me know if my words need any clarification david j james!

Shawn

xtal_z_pwr_cin_5pf_20pf_042723v1p0.pdf

Dear david j james,

david j james said:

Question : why does increasing capacitance increase the Power Dissipation inside the crystal? 

A good question and one commonly asked an so I am glad mentioned it.! I am not sure of the quartz crystal unit parameters you are simulating with, but it is common for a 10 MHz  to roughly 100 MHz AT cut quartz crystal unit to exhibit that behavior. Intuitively, as the effective capacitance across the quart crystal unit becomes larger, its reactive impedance becomes smaller in magnitude (albeit a negative number). Since for steady-state oscillation, the sum of both the real and imaginary impedance of the sustaining amplifier and the real and imaginary impedance of the quartz crystal unit must be zero, this means its inductive impedance must also become smaller. This means the oscillation frequency will approach the series resonant frequency of the quartz crystal unit where its real impedance is a minimum. Therefore, the current flowing through the quartz crystal unit's real impedance is increased. With a real impedance of sometimes less than 10 ohms and any reasonable sustaining voltage across it of, say 0.50 Vpp, the power dissipation of the quartz crystal unit can be very significant. This is also why if an oscillator frequency is designed to operate close to its series resonant frequency its power dissipation is a factor that must be seriously considered.

In effect, at series resonance, the impedance of the quartz crystal unit is totally real and hence is a minimum. I've illustrated the operating point on a quart crystal unit for two cases -  an input capacitance of 5 pf  on page 1 and an input capacitance of 20 pf on page 2 of the attached Portable Document Formatted file. Note that as the input capacitance increases, the operating frequency moves closer to series resonance of the quart crystal unit and its power dissipation increases.

I hope my explanation makes some sense, but let me know if my words need any clarification david j james!

Shawn

xtal_z_pwr_cin_5pf_20pf_042723v1p0.pdf

In my example, with 3Vpp across the crystal and recommended ( by manufacturer) of 10pF external caps this gives Power Dissipation >> 100uW, which is TWICE the Cadence simulation result. The 3Vpp is not flexible before you ask. Is it 3Vpp unusual to use rail to rail drive?

Dear david j james,

david j james said:

In my example, with 3Vpp across the crystal and recommended ( by manufacturer) of 10pF external caps this gives Power Dissipation >> 100uW, which is TWICE the Cadence simulation result.

I can't reproduce your result as I do not know your quartz crystal unit's parameters.

1. Is the 10 pf the specified load capacitance on its data sheet?

2. Is that the 10 pf you used in the workbook calculator or did you add something to it?

3. Did you enter a voltage of 3 V in the workbook? The units adjacent the entry box indicate the voltage is the rms voltage and not the peak-to-peak voltage. If your driving waveform is "CMOS" like (i.e., analogous to a square wave), the correct value is 1.50 Vrms. If it is closer to a sinusoid, the correct value is 1.067 Vrms. If you used the peak-to-peak value and the waveform is square, that might explain the difference in the workbook result and your Cadence result as the use of the peak-to-peak voltage will double the power esult relative to the power when the correct rms value is used in the workbook.

david j james said:

The 3Vpp is not flexible before you ask. Is it 3Vpp unusual to use rail to rail drive?

It is a little large, but not unheard of.

Shawn

1. I am looking at a range of crystals in the 10 -50MHz range. They all quote 10pF or more Shunt Caps values.

2. For Input Capacitance I made the following rough estimate : 

• External Shunt caps : 2 x 10pF
• Amplifier Input/output Capacitances : 2 x 2pF ( allowing for pads, PCB, ESD etc )
• Total : 24pF
• Does this sound right or silly?

3. Again you are right. I didn't read the excel carefully. The voltage on the pin is sinusoidal rail to rail.

Dear david j james,

Thank you for the added and helpful information! A comment or two follow if I may  - and you have the patience with me!

david j james said:

1. I am looking at a range of crystals in the 10 -50MHz range. They all quote 10pF or more Shunt Caps values.

I understand. The shunt capacitance specified, 10 pf in your example, specifies the load capacitance where the oscillation frequency will be exactly the specified quartz crystal unit frequency at the specified temperature. Hence, if the accuracy of your output frequency is critical (less than say 50 - 100 ppm from the 10 - 50 MHz crystal unit's frequency), it is important that the total load capacitance the terminals of the crystal unit is the specified load capacitance - or 10 pf in the example you provided.

david j james said:

2. For Input Capacitance I made the following rough estimate : 

• External Shunt caps : 2 x 10pF
• Amplifier Input/output Capacitances : 2 x 2pF ( allowing for pads, PCB, ESD etc )
• Total : 24pF
• Does this sound right or silly?

The effective load capacitance in the Pierce topology is composed of the total capacitance consisting of the parallel combination of the values of C1 and C2 you show in a later Forum post plus your board stray capacitance(s) plus your amplifier input capacitance. I've put together a view of the relevant "equivalent" board and amplifier capacitances and the equivalent load capacitance seen by the terminals of the quartz crystal unit as Figure 1. I hope this helps!

Shawn

Figure 1

Sorry, I just looked at Figure 1 and realized I made an error! The corrected version is shown below.

Shawn

OK, so using that calculation in my application : 

• External Shunt caps : 2 x 10pF
• Amplifier Input Capacitances : 2pF ( allowing for pads, ESD etc )
• PCB Capacitance : 3pF ( worst case)
• Total : 11pF
• so gives Operating Power Dissipation = 6.3uW.