ORCAP-1589: Net has two or more aliases that might lead to a short.

This is a legacy from when Orcad was invented 40 years ago. The "standard" was a 5V supply called Vcc or Vdd, and a positive and negative higher voltage supply for analog stuff. Instead of wiring all the power pins on the schematic together, Orcad decided to connect them "behind the scenes" based on their names. This was an excellent strategy for at least 10 years. For the last 20 years at least this is a pain. It forces us to declare all power pins as passive to avoid this pseudo-error. I wish Cadence would add an option to disable this feature. I am not hopeful, the software people don't really know how the hardware people work, and it seems that Cadence has a very limited budget for improvements in Capture. They still need to figure out that there is credible competition, and when the schematic capture tool changes Allegro is also no longer used.

Close but not quite.  Allegro had a powerful but awkward schematic capture tool called Concept.  One of the flexibilities was each part could have a lot of properties attached, because unlike Capture, Concept connected physical parts downstream just as going to the board layout, so these properties would help specify parts from a searchable database.  Capture forces the user to select a part up front.  Thus, in Concept if you needed to increase the power handling of a resistor, you modified that property and re-ran the search.

In this case, Concept would let you have both a netname and label for each pin.  Capture narrowed it down to just a net name property now called "Pin Name"

To have a different graphical label for a pin, create a new pin property specfy as "Label", set it equal to "VCC" which will now appear on the part alongside the Pin Name used by Capture.  You can them make the Pin Name, in my case, "V1V2" which is my power net hidden.  So you can leave the type as "Power" and all the checks run correctly, VCC appears in the graphic, and your power nets are confirmed.

Close but not quite.  Allegro had a powerful but awkward schematic capture tool called Concept.  One of the flexibilities was each part could have a lot of properties attached, because unlike Capture, Concept connected physical parts downstream just as going to the board layout, so these properties would help specify parts from a searchable database.  Capture forces the user to select a part up front.  Thus, in Concept if you needed to increase the power handling of a resistor, you modified that property and re-ran the search.

In this case, Concept would let you have both a netname and label for each pin.  Capture narrowed it down to just a net name property now called "Pin Name"

To have a different graphical label for a pin, create a new pin property specfy as "Label", set it equal to "VCC" which will now appear on the part alongside the Pin Name used by Capture.  You can them make the Pin Name, in my case, "V1V2" which is my power net hidden.  So you can leave the type as "Power" and all the checks run correctly, VCC appears in the graphic, and your power nets are confirmed.