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  3. Connecting to GND and VCC planes while routing

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Connecting to GND and VCC planes while routing

AKSHAYA
AKSHAYA over 15 years ago

Hi

    I have created a board with four layers. The inner layers are ground and VCC and the VCC and GND nets of the circuit made electrically connected to these planes by changing the net name. How we can connect the top and botton VCC and GND tracks to these planes. Is it possible using via, burried via or blind via. Whether we can put vias where ever connections are required or we have to connect using only one two vias. If vis is to be used what should be  the specifications of thermal pad and anti pad?. I am using only SMD pads.

Hope somebody may be able to help me 

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  • AKSHAYA
    AKSHAYA over 15 years ago
    Hi

    Thanks for your valuable time. I am working first time with multi layer board with  ground and VCC inner layers. My question is that if we put regular vias to connect the top layers tracks to inner layers , since that regular via starts from top layer and ends with the bottom layer will it not make short betwwen all the layers other than the top track and respective power plane?. Can U please suggest some standard via dimensios for a 4 layer board with top and bottom layers as component layers and miiddle layers as power planes. I am using only SMD components. Is thermal pad and anti pad are significant in this case?. How can we check the unrouted pins in Allegro?           Waiting for a response.

    Regards
    Akshaya
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  • AKSHAYA
    AKSHAYA over 15 years ago
    Hi

    Thanks for your valuable time. I am working first time with multi layer board with  ground and VCC inner layers. My question is that if we put regular vias to connect the top layers tracks to inner layers , since that regular via starts from top layer and ends with the bottom layer will it not make short betwwen all the layers other than the top track and respective power plane?. Can U please suggest some standard via dimensios for a 4 layer board with top and bottom layers as component layers and miiddle layers as power planes. I am using only SMD components. Is thermal pad and anti pad are significant in this case?. How can we check the unrouted pins in Allegro?           Waiting for a response.

    Regards
    Akshaya
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