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  3. Connecting to GND and VCC planes while routing

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Connecting to GND and VCC planes while routing

AKSHAYA
AKSHAYA over 15 years ago

Hi

    I have created a board with four layers. The inner layers are ground and VCC and the VCC and GND nets of the circuit made electrically connected to these planes by changing the net name. How we can connect the top and botton VCC and GND tracks to these planes. Is it possible using via, burried via or blind via. Whether we can put vias where ever connections are required or we have to connect using only one two vias. If vis is to be used what should be  the specifications of thermal pad and anti pad?. I am using only SMD pads.

Hope somebody may be able to help me 

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  • vramanan
    vramanan over 15 years ago

     Hi Akshaya

    my understanding is you have SMD components on either side of the board and want to connect the VCC/GND signals to the shapes on the inner layers

    I assume that you have created the shapes on the inner layers and assigned them to respective nets

    VCC layer should have a shape that is assigned to VCC and GND layer to GND net

     

    having achieved that, 

    you have to use vias to connect the top/bottom side SMD component's individual pins to their respective planes

     

    for example let's assume U1 pin 1 is connected to VCC and U1.10 is to GND

    you have to draw a cline from U1.1 and add a VIA in a clearance away from any obstruction

    The VIA will automatically connected to the respective plane

     This happens for the GND as well

    Now regarding the VIA sizes/Drill

    Here is a quick rule of thumb

    p.s. FHS means Finish Hole Size

    If the design requires a 0.012” +/- 0.003” finished plated through hole.

    Pad diameter = (0.012” + 0.005”) + 2x (0.001”) + 0.010”

    Anti-Pad Diameter= Pad Diameter+10

    Thermal Pad 

    I.D = Inner Diameter = Drilled hole size(FHS)+ 2 x(annular ring)+0.010”

    O.D=Outer Diameter = I.D + 0.020”

    Spoke width can be from min 8 mils

     

    but for vias less than 14 mil FHS use direct contact, that means zero thermal

    regards

    Venkata

     

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  • AKSHAYA
    AKSHAYA over 15 years ago
    Hi

    Thanks for you reply. My clarification is that  when we put via to connectt the track on the outer layers to shapes in the inner layers will it automatically put blind vias from the respective outer layers to the respective inner layers or we have to select blind vias  depending upon the layers we are connecting?. If we put blind vias for each pin connection is the cost will escalate because of increase in number of blind vias. Is there any difference in manufacturing cost depending on the number of through via, burried via and blind via? Hoping a valuable help

    Regards
    Akshaya
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  • vramanan
    vramanan over 15 years ago

     Hi

    Not to bust the  excitement, there is no such thing as automatic via selection

    You have to first figure out which Via technology  you are using and setup according to it,

    If you go with blind via then you have setup the board such that when a signal is routed from top layer the proper via will be selected and the same works for the bottom layer

     Generally microvia/blind/burried via costs atleast 2-3 times more than that of regular via.

    The HDI vias are used exclusively in complex high speed designs with high layer count unless your company don't care about the money you could use in any designs

    I haven't used HDI vias in an 4 layer board

    regards

    Venkata

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  • AKSHAYA
    AKSHAYA over 15 years ago
    Hi

    Thanks for your valuable time. I am working first time with multi layer board with  ground and VCC inner layers. My question is that if we put regular vias to connect the top layers tracks to inner layers , since that regular via starts from top layer and ends with the bottom layer will it not make short betwwen all the layers other than the top track and respective power plane?. Can U please suggest some standard via dimensios for a 4 layer board with top and bottom layers as component layers and miiddle layers as power planes. I am using only SMD components. Is thermal pad and anti pad are significant in this case?. How can we check the unrouted pins in Allegro?           Waiting for a response.

    Regards
    Akshaya
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  • vramanan
    vramanan over 15 years ago

     Hi

    Not to be rude, you questions covers so many aspects and it is not easy to explain 

    I would recommend you to attend some classes whcih will enable you to understand why certain things are done

    My reply will answer your question but will not explain why 

    Please go throught the documents available at

    <CDSROOT>\SPB_16.2\doc\algroroute

    <CDSROOT>\SPB_16.2\doc\algroman

    and search in google for pcb design tutorial

    I got 10200000 hits

    the first one seems really good

    http://www.alternatezone.com/electronics/pcbdesign.htm

    also search for PCB DFM guidelines which will explain the via dimensions and every other aspect

    http://www.npd-solutions.com/designguidelines.html

     

    Regards

    Venkata

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