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Vias under package

nutron

So i have this footrpint where the manufacturer suggests thermal vias under the package as shown in this picture....

I used Ultra librarian to create the footprint for ORCAD. The problem is that it turned each via into a pin though .....

I would like to know if this is the way it is done in ALLEGRO or if there is a better way to place vias under a package footprint?

Parents

  • I thought heat was best conducted through the vias into the (larger/continuous) ground planes.  FLIR analysis of test boards has me suspecting better heat conductivity on surface pours under the device..   I always create SMD footprints and add stitching vias as we don't always use parts at full power, so a fixed number of vias doesn't pay off for us.  Vias are always part of the board object.  

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  • I thought heat was best conducted through the vias into the (larger/continuous) ground planes.  FLIR analysis of test boards has me suspecting better heat conductivity on surface pours under the device..   I always create SMD footprints and add stitching vias as we don't always use parts at full power, so a fixed number of vias doesn't pay off for us.  Vias are always part of the board object.  

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