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  2. Allegro X PCB Editor
  3. Test Point to Component Distance Report

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Test Point to Component Distance Report

obwise
obwise over 4 years ago

Hey guys

I was working on a test point to component csv parser file to see if I could find test points that were too close to each other according some clearance rules and the scope expanded beyond what i'm capable of right now on the software side of things.  While still working on this project for my own sake, I wanted to know if there was already a feature of OrCAD PCB Designer where I could see a report of test points that are too close to components or that would at least display distances between components, if they're on the top or bottom.  I would like the edge to edge distances between the test points and components.

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  • jc teyssier
    jc teyssier over 4 years ago

    You can set a distance between component outline and testpoint but this is a uniq value used for all components. it can be set relative to package geometry assembly (be aware in this case that assembly NEEDS to be closed to be considered as an obstable; if not testpoint can be under.) or place boundary.

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  • obwise
    obwise over 4 years ago in reply to jc teyssier

    Thanks for getting back to me.  The issue is sometimes when we send the board to the contract manufacturer CM, even though we have set clearance rules, they say that some of the board violates the clearance rules as far as test points and components.  Not all the test points and components violate the distance clearance between each other, but some of them do.  I was wondering if there was a way to generate a report of the tps that violate the tp to tp clearance rule and tp to component clearance rule.  If that makes more sense or no sense...

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  • B Bruekers
    B Bruekers over 4 years ago in reply to obwise

    The Productivity Toolbox contains a tool than can check testpoints vs components: <cdsroot>\share\pcb\toolbox\help\advtpcheck.pdf

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  • jc teyssier
    jc teyssier over 4 years ago in reply to obwise

    Sound like component symbol misdrawn: if package geomtry/package_top (or bottom) is NOT a single closed line (exemple: 4 line drawing a rectangle is NOT a closed line) then the drc system does not work properly. Each closed line is considered as body. As an example, i draw my soic package with a closed line (to maximum values including tolerancing) for body and each pin is also drawn with a closed line.

    You can try the use of placebound instead is parameters but distance values have to be adapted. This is an other approche.

    Second, allegro check test point distance between them only when generated: if test point  (position and /or definition) then you have to recheck it.. To do this, i use the testpoint resequence with remove testpoint too close active: if some testpoint are removed it is likely they where moved after generation.

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  • obwise
    obwise over 4 years ago

    Thanks jc teyssier and B Bruekers for the information.  I'll take into the account the geometry of the package and also the productivity toolbox looks really promising for our applications.  I will update you guys on whether the team here is satisfied with what I've been given from you guys.  I think though this information is really good. 

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