Test Point

Hi try

Via class / Soldermask_Bottom

Pin /Soldermask_Bottom.

That should work

Thank for the reply, in fact with Via class / Soldermask_Bottom works. 

the fact is: why allegro considers the test point as if it were a via and not a pin? 

Testpoints are not netlist items from the schematic.   

Every software I've used since Scicards, testpoints are vias with properties added that protect them.

Testpoints are not netlist items from the schematic.   

Every software I've used since Scicards, testpoints are vias with properties added that protect them.

A test point can be a part, it depends on your definition of what a test point is.  for example:

https://www.digikey.com/en/products/detail/keystone-electronics/5023/5255493?s=N4IgjCBcpgHAzFUBjKAzAhgGwM4FMAaEAeygG0R5YAWWANlhAF0iAHAFyhAGV2AnAJYA7AOYgAvkQC0EaCFSRMuQiXKU6zcZJAAmNezw5OTcUA

This part  is called a test point.

We use Kobicon "test points"

We use Keystone Test points

We use unpopulated headers as test points.

It is all in the definition of what you desire as a test point.

So if I don't put these components in the schematic, how would I show them in the BOM, and the 3D assembly drawing?

Hi thanks for the reply... by test point I mean a point of the pcb where the track is interrupted by a circular pad without solder mask (therefore discovered) in which with my probe I go to carry out the measurements during the collapse phase.

I assumed that, but clarity is needed, others that read these forums may not understand what you are requesting.   If you google test points, a wiki page shows up:

https://en.wikipedia.org/wiki/Test_point

So I added this comment for the community to understand.