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  3. How to perform the EMI / EMC analysis on the PCB layout

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How to perform the EMI / EMC analysis on the PCB layout

RohitRohan
RohitRohan 10 months ago

Hai Community,

I have a PCB board which has multiple high speed nets and I want to perform the EMI and EMC checking.

Which Cadence tool should I use for checking the EMI and EMC coupling?

Regards,

Rohit Rohan

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  • John T
    0 John T 10 months ago

    Hi RohitRohan, there are many elements of a design which one can analyze in order to improve Electromagnetic Compatibility in the design. Perhaps you might like to specify specific types of checks which you are interested in. For coupling and crosstalk, with a high-speed license, the In Design Analysis (IDA workflows) provide a high-speed analysis and checking environment capability within the Allegro PCB Editor framework. This utilizes some of the capabilities of the Sigrity Aurora mathematical solver. The workflows available in the PCB Editor with a high speed license are: Impedance, Coupling, Crosstalk, Return Path, Reflection, and IR Drop.More information can be found here:

    Article (20487572) Title: Allegro Integrated Analysis and Checking: Reflection Analysis
    URL: https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O0V000009MqUQUA0

    This IDA workflow does not need a Sigrity license but the software itself must be installed on the same machine alongside the Allegro tool, and with the same tool release version. For advanced analysis, the Sigrity Aurora tools can be purchased for complete analysis:

     System Analysis Knowledge Bytes: Simplifying Signal and Power Integrity Analysis with Sigrity Aurora 

    There are also several checks that can be performed using Allegro's Constraint Manager alone. These include: Coupling parameters and phase checks of differential pairs, trace impedance and trace width, total etch length checks, propagation delay and tuning of high speed match groups with timing or phase budget, Return Path of signal traces, and Return Path Via checks.

    https://resources.pcb.cadence.com/cadence-videos/allegro-return-path-stitching-via-2

    Hopefully I haven't missed anything. 

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