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Allegro 17.4 PCB Designer Trying to create a netlist report with Part Number and Alias.

NP202510093218

Howdy all,

I'm using Cadence Allegro 17.4. I made a schematic capture with signal names. However when i do a netlist report i get a name that is not the signal name, I get the origin name of the net. I tried in Allegro Design Authoring: Design Entry HDL and Allegro PCB Designer 17.4.

That makes sense that intermediate signals are not listed, however I'm trying to check that I have the pin out labeled correctly according to an Excel doc. 

Is there anyway to generate a report with these signal?

Ideally Id like a report like PR1 | 5_B10 | GND_S_S8, not the MB01_006052.... identifier.

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