Obtain all 'shorting' errors via skill

OK thanks David

I need to re-write my description as this process is layout driven or it won't be useful. 

I was using the skill "find" command to iterate through all pad-to-pad DRCs, extract the associated net names, and write a back annotation file provided one of the two nets associated has a "TEMP" prefix.  Otherwise, skip.

In order for this to work, you need to add temporary single pin pads to nets in the schematic to go to layout and cause DRC errors.   

The end-result is driven by placing these temp pads to cause intentional shorts.  An annotated schematic with updated net-aliases to make connections for clean, optimized routing is the intended result.

Wanted to save you hours of time searching for the secret method of reading netnames from a DRC error instance as this is something SKILL iLS training and the rest of their support website is strangely silent on, finding the net name associated with... anything.

The code I shared iterates through DRC errors flagged by Allegro.  Do you want to calculate object spacing in SKILL? 

It's not difficult:

drcs = setof(drc, axlDBGetDesign() ->drcs, drc ->type == "NET SPACING CONSTRAINTS" && zerop(axlMKS2UU(drc ->actual)))
foreach(drc, drcs
netnames = mapcar(lambda((vio), vio ->net ->name), drc ->violations)
)

The goal is to find only those errors that are generated from shorting 2 differently named nets - then obtain net names of the 2 offending elements.

I think I can use DavidHutchins suggestion for what I am after.  The intent of posting this question was to find out if there's any other way to finding only 'shorting' errors and based on DavidHutchins response there isn't.  That is, for each error figure out 'Net Spacing Constraint' type and if the actual constraint value is 0 and net names of 2 elements are different values then that error is due to shorting of nets.