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Can I 'fix' a constraint to a footprint once it's placed?

EvanShultz

I have an 8-pin header for a footprint that has 3 leads for each logical connection (pin in the header). The schematic symbol only shows one pin for each logical connection, and the footprint uses the pin and a pair of vias. The annular rings of the vias are touching and there is a Cline connecting the pins and each via on the Top and Bottom copper layers. When the footprint is placed on the board, "Thru Via to Thru Via Same Net Spacing" DRC errors are created because the vias are overlapping. See the attached picture.

I can eliminate the DRC errors by changing the SNS constraints in CM (I am using 16.2). But I'd rather assign some property/constraint on the footprint, so I don't have to mess with CM for this one circumstance. If I set a constraint in CM on the DRA file, that constraint is overridden by the board's constraints once the footprint is placed. Is there a way to set a property/constraint on the footprint that will 'stick' even once the footprint is placed on a board with differing SNS contraints?

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  • EvanShultz

     Hi Rik,

     Thanks for the suggestion! Unfortunately, the DRC error is being created between vias that touch on the symbol, not pins. So this property won't help me.

    Any other ideas?

Reply
  • EvanShultz

     Hi Rik,

     Thanks for the suggestion! Unfortunately, the DRC error is being created between vias that touch on the symbol, not pins. So this property won't help me.

    Any other ideas?

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