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  3. Stability analysis of an ECU by using PSPICE

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Stability analysis of an ECU by using PSPICE

madhuraj
madhuraj over 12 years ago

Hi,

I am doing the stability analysis (need to look at the amplitude response, phase response and phase delay) of an electronic circuit which will drive a DC motor (ofcourse its a closed loop system). The input to the circuit varies from +10 V to -10V and circuit contain opamp ELH0041. I am using ORCAD PSPICE for the modeling and would like to know, what kind of source model I can use for this analysis and what kind of analysis I should select from PSPICE.

Any inputs on this will be highly appreciated

regards

MAdhu

 

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  • Alok Tripathi
    Alok Tripathi over 12 years ago

    You should perform AC analysis and make sure your input voltage source has "AC" property and it's value is set = 1. This analysis will enable you to analyze circuit response in frequency domain. You can observe gain & phase at desired output node in per unit terms. You may need to replace complex sub circuit models (if used in circuit) by equivalent small signal model for successful AC analysis. In short - this would give you bode plot at point of interest in you circuit. One can configure a circuit to be open loop or close loop.

     

     

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  • madhuraj
    madhuraj over 12 years ago

    Hi,

    Thanks alot for your reply. I used a VAC soucre from PSPICE library for the analysis with 1Vac. The DC offset value (Vdc) was set to zero.This shows zero output from the source after the analysis. When I changed offset value to 1Vdc , the output became 1V, but analysis results were reversed. Do we really need to give a DC offset value for the frequency response analysis?

    regards

    Madhuraj

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  • Alok Tripathi
    Alok Tripathi over 12 years ago

    Generally speaking, DC bias should not be needed or it should not have impact on overall stability. However this can be confirmed for a given circuit only. Change in output as standalone point of observation, may not be meaningful from stability point of view, one need to observer GAIN/Phase margin at the point where loop is being closed.  

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  • madhuraj
    madhuraj over 12 years ago

    Thank you

    Madhuraj

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  • madhuraj
    madhuraj over 12 years ago

    Hi,

    I am also interested in phase delay. Can I do it in Pspice?

    regards

    Madhuraj

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