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Should I worry about die signal overshoot?

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I have a SigXplorer simulation showing overshoot at the die level for a mobile DDR (1.8V) device driven by a fairly new ARM11 device that violates the overshoot specification fr the memory.  However, the package pin shows no specific overshoot problem.  The trace length is less than 1/2 inch and the speed is 133MHz.  The trace is controlled impedance.  According to the memory vendor, they say their specification is for the waveform at the package pin.  But according to the CPU vendor and a high speed design consultant, they say that the signal performance at the die is also important.

So, who do I believe?

The simulation only fails the overshoot specification when the Simulation Modes is set to FTS Mode: Fast.  Typical and slow are fine.  Attached is the printout from the simulation.  Feel free
to email me if you have a definitive answer.  Thanks in advance.


Originally posted in cdnusers.org by fitzdean
fast_plot.pdf
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    Hi Dean,

    It's true that the signal at the die is "important" and "what is actually seen by the device".  However, if the memory vendor has written their overshoot spec for the "package pin" then they have accounted for what the die will actually see.  It's common to spec things at points visible to the outside world.  You're using the simulator to "peak" at what is actually going on inside, but most people (particularly those with oscilloscopes!) can not see the waveshape there.  Consequently, IC vendors write specs for waveshapes at the pins.  They know what an overshoot at the pin can cause at the die and have derated their specs accordingly. 

    I'd say go with what/where each part vendor has spec'd. 

    Donald


    Originally posted in cdnusers.org by Donald Telian
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  • archive

    Hi Dean,

    It's true that the signal at the die is "important" and "what is actually seen by the device".  However, if the memory vendor has written their overshoot spec for the "package pin" then they have accounted for what the die will actually see.  It's common to spec things at points visible to the outside world.  You're using the simulator to "peak" at what is actually going on inside, but most people (particularly those with oscilloscopes!) can not see the waveshape there.  Consequently, IC vendors write specs for waveshapes at the pins.  They know what an overshoot at the pin can cause at the die and have derated their specs accordingly. 

    I'd say go with what/where each part vendor has spec'd. 

    Donald


    Originally posted in cdnusers.org by Donald Telian
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