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who does SI/PI simulations? the hw engineer or the layout designer?

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hi.

who does SI/PI simulations: hw engineer or layout designer?  if there is no SI engineer.
do all companies use the allegro simulation capabilities? (at least reflection analysis)

and anyway, how much control does the hardware engineer have over the layout:
can he say to the layout engineer this?-"put these 10 capacitors here and not there" or "put the termination here" or "make this splitplane wider"...

who specifies the layer stackup, materials, trace widths, footprint assigments, bus-layer assigments...


Originally posted in cdnusers.org by buenos
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    In general, the PCB layout person does not have the background to be able to do the SI/PI simulations. Some companies or departments simulate, some don't. More of them should. The H/W engineer has significant control over placement but it is a balance between mechanical, thermal, ease of routing, I/O locations, etc. It is usually a team effort. The first placement is sometimes done using post-IT notes on a piece of cardboard. Location of terminations is driven by signal integrity considerations.

    Stackup, trace widths, and dielectric material are a balance between cost, impedance requirements, routing difficulty, emi/noise requirements, how many DC voltage planes are needed, etc.

    It sounds like you are new to the hardware design process. Spend some time talking to an experienced hardware designer.


    Originally posted in cdnusers.org by Kalevi2
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  • archive

    In general, the PCB layout person does not have the background to be able to do the SI/PI simulations. Some companies or departments simulate, some don't. More of them should. The H/W engineer has significant control over placement but it is a balance between mechanical, thermal, ease of routing, I/O locations, etc. It is usually a team effort. The first placement is sometimes done using post-IT notes on a piece of cardboard. Location of terminations is driven by signal integrity considerations.

    Stackup, trace widths, and dielectric material are a balance between cost, impedance requirements, routing difficulty, emi/noise requirements, how many DC voltage planes are needed, etc.

    It sounds like you are new to the hardware design process. Spend some time talking to an experienced hardware designer.


    Originally posted in cdnusers.org by Kalevi2
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