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Allegro DRC issues once again

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Hi all,

    And thanks in advance for any responses on this one as this is yet another strange emerging requirement in the high speed design world.  We have seen discontinuities on 100OHM diff pairs that has been root caused to the weave of the dielectric material.  The weave material has a different Dk than the epoxy, and one side of the pair may parallel the weave wile the other parallels the epoxy. We have seen Intel information that talks about this effect and both the Intel data sheet and the manufacturing vendor recommend that the design be rotated 10-15 degrees as the solution. I believe it is impractical to lay out the design like this so I decided to apply the rotation factor at manufacturing output time. This causes me 2 problems  one I don't like but can deal with is I have to maintain 2 databases at output for  2 reasons the assembler can't deal with the rotation on the data coming in i.e. pick and place fabmaster and ICT. The 2nd is ECO maintenance of the design going forward would be done on the orthogonal or non rotated version. The 2nd problem is disturbing to me and have not found a good way to fix yet. After rotating the design 11.25 degrees I have thousands of DRC's on a design that had none.  Even after turning off same net DRC I still had thousands. This is unacceptable. Does anyone have any experience with this? Maybe I need a different approach.  Passing it off to the vendor  to do though nullifies the IPC356 netlist test as none of points match from the CAD netlist to the vendor rotated artwork, so that is out golden board test does not work for us.
    I would also like to invite you all CDN Live in SanJose September 10-12th. I will be there hosting a table at the Networking luncheon on Monday and would like to meet you all. There are some excellent topics on the new features and usage models in the 16.0 release and one particular paper of interest to anyone involve in PLM integration is Cadence Allegro SPB Technology and Agile PLM Integration – A Case Study.

BTW Early registration ends August 26, 2007

www.cadence.com/.../index.aspx

Carl


Originally posted in cdnusers.org by CTMusetti
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    Since this stems at the fab sho,p can the fab shop do something about it ? What prevents them from rotating the dielectric before applying it?

    -barbara Seeger - Cadence


    Originally posted in cdnusers.org by Barbara Seeger
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    We had this problem and we found no physical work around. It seems to be due to rounding of the spacings. You also get thousands of uncoupled length issues as well. We have tried a couple of variation since with no real success. If the traces are localised and few, then you can copy the traces and rotate them whilst keeping the rest of the design square. Ideally get the PCB vendor to rotate the design within the cad tool once they have run their checklists. In my experience the front end tools can handle pre-rotated designs but they can take much longer to process.

    KP


    Originally posted in cdnusers.org by kp
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    Signifigant change in tooling and process. Tooling is not currently set up for this but maybe it can in the future, actually the best solotion would be for the material vendor to produce weave at at 10-15 degrees, but the same is true for them requires a signifigant change in their tooling and processing.


    Originally posted in cdnusers.org by CTMusetti
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    Front end can handle most of the roatation, I am told that the text is not done properly with Valor, I don't have Valor so can't verify this. Bottom line is if the vendor does they want to send the artwork back to us and us to approve it and be responsible for it, if this is the case I might as well do it myself and check myself but very difficullt to feel confident about the check when allegro's DRC goes wacko.  As far as I see it either the clearances were right orthoganal no matter what way I rotate it should be the same.  I have uncoupled diff pair that are off by 30 and 40 MILs now when the were exactly on before.


    Originally posted in cdnusers.org by CTMusetti
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