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How to setup design rules for one chip?

Allegro version is 15.7.

One chip(U1, mcu) 's design rule is different from the rest circuit,
now i want to setup a design rule for U1(pin to pin : 10mil),
how to setup it in constraints menu.
the more detailed, the better.

thanks in advance.

Originally posted in cdnusers.org by watchdog1976

archive over 17 years ago

Why don't you use area constraint property.
Have one area for U1.Create separate class under physical and spacingconstraint properties.Attach these to are property.
Regards,
Satya

Originally posted in cdnusers.org by satya1234
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archive over 17 years ago

good suggestion, thanks

Originally posted in cdnusers.org by watchdog1976
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