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  • Discussion

    Unable to load a physical part in Concept HDL

    Category: PCB Design

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    updated over 17 years ago by archive

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  • Discussion

    Preferred ECO procedure.

    Category: PCB Design

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    updated over 17 years ago by archive

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  • Discussion

    Remove Netlist ?

    Category: PCB Design

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    updated over 17 years ago by archive

    1 replies • 14467 views
  • Discussion

    DE HDL part number not changed

    Category: PCB Design

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    updated over 17 years ago by archive

    6 replies • 15117 views
  • Discussion

    Is angle routing recommended for XAUI??

    Category: PCB Design

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    updated over 17 years ago by archive

    4 replies • 13937 views
  • Discussion

    Creating foot print in orcad v16 demo

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    started over 17 years ago

    0 replies • 12316 views
  • Discussion

    Regarding placement of decaps

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    updated over 17 years ago by archive

    4 replies • 13628 views
  • Discussion

    How to connect vias in plane if it's voided?

    Category: PCB Design

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    updated over 17 years ago by archive

    6 replies • 4128 views
  • Discussion

    Allegro PCB Editor 15.7 shortcut key setting

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    updated over 17 years ago by archive

    7 replies • 22295 views
  • Discussion

    How to connect vias in plane if its voided?

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    started over 17 years ago

    0 replies • 12342 views
  • Discussion

    Allegro Design Entry HDL Irritations (V16.01)

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    updated over 17 years ago by archive

    2 replies • 12892 views
  • Discussion

    How to convert schematics format from HDL to CIS?

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    updated over 17 years ago by archive

    1 replies • 13163 views
  • Discussion

    consideration for mixed signal layout

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    updated over 17 years ago by archive

    1 replies • 12797 views
  • Discussion

    Regarding setting relative propagation delay

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    updated over 17 years ago by archive

    1 replies • 14084 views
  • Discussion

    .in file error in PCB SI or Sigxplorer

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    updated over 17 years ago by archive

    1 replies • 12649 views
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