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PCB Design & IC Packaging (Allegro X)

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Forum - Thread List

Latest Posts

  • Discussion

    How to find out a misaligned via from a via stack

    Category: Allegro X APD

    By SaiPavanl

    •

    updated 2 months ago by AA202605191046

    4 replies • 1208 views
  • Discussion

    How to generate IC style via cut arrays in GDS output?

    Category: Allegro X APD

    By SaiPavanl

    •

    started 2 months ago

    0 replies • 456 views
  • Answered

    IPC2581 import issue: traces shown as lines. How to convert it to Clines?

    Category: Allegro X PCB Editor

    By BC202603263145

    •

    updated 2 months ago by BC202603263145

    2 replies • 987 views
  • Discussion

    Managing Cross-Probe Results Efficiently in OrCAD X Capture CIS

    Category: Allegro X Capture CIS

    By IshaS

    •

    started 2 months ago

    0 replies • 631 views
  • Suggested Answer

    Field Solver Selection in Allegro (BEM2D vs EMS2D)

    Category: Allegro X PCB Editor

    By Electro Node

    •

    updated 2 months ago by Electro Node

    4 replies • 1205 views
  • Discussion

    count via by net and layer to csv file

    Category: Allegro X PCB Editor

    By zpofrp

    •

    updated 2 months ago by Hoangkhoipcb

    2 replies • 969 views
  • Not Answered

    Add a tcl command I created and registered to the toolbar and also assign an icon to it programmatically for capture 17.2 version

    Category: Allegro X Scripting - TCL

    By RS202512234819

    •

    updated 2 months ago by CadAP

    1 replies • 790 views
  • Answered

    OrCAD X Capture 25.1 – PDF Export in Variant Mode Produces Extra Pages and Error Message

    Category: Allegro X Capture CIS

    By Kevcsc

    •

    updated 2 months ago by Krissn

    20 replies • 6513 views
  • Answered

    Increase default pin spacing when creating parts from spreadsheet

    Category: Allegro X Capture CIS

    By LogicNet

    •

    updated 2 months ago by TechnoBobby

    1 replies • 932 views
  • Suggested Answer

    Cannot generate ODB++ output for a particular design. The tool fails with eif_cadence-583004 error.

    Category: Allegro X PCB Editor

    By BC202603263145

    •

    updated 2 months ago by MZ20250602835

    4 replies • 1146 views
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