DesignLink: Multi-Board Analysis (Allegro X – Topology Workbench)

DesignLink allows multiple board and package layout files to be linked together logically and electrically.

To simulate a system of designs, you must specify the designs that comprise the system (the design links) as well as information regarding how to connect the designs together. To do this, you use DesignLink. A design link is a type of signal model within a DML file that specifies both a set of connections and the other designs to which you make connections. Each system configuration file is established (seeded) from a design link.

Allegro X PCB Editor supports creating design links, which can then be taken to Topology Workbench for analysis purposes. You can set up a detailed timing analysis from the ASIC components on the main board to the memory devices on the DIMM modules from die to die. DesignLink is also integrated with the Constraint Manager system, allowing full system-level constraints to be implemented across multiple boards for timing and relative propagation delay management of buses and other nets.

In the following example, a DesignLink connection between the board and memory module will be created, which will enable the co-simulation of both boards as if they were one design.

1. In Allegro X PCB Editor, open the Signal Analysis Initialization window (Analyze > Initialize) and create a new design link.

2.You can add your boards by using the Add File button in System Configuration Editor.

3.Then, you need to establish the connections between these boards for co-simulations.

4.Connect by cable or component by using reference designators.

5. When the DesignLink setup is done, go to Analyze > Probe and click on View Topology in the Signal Analysis Topology Workbench opens. Here, you can review and set the parameters and run analysis.

You can read more about the PCB Editor and Topology Workbench integration in the following blog:

https://community.cadence.com/cadence_blogs_8/b/pcb/posts/optimizing-designs-with-pcb-editor-topology-workbench-flow

Let us know in the comment section if you are interested in learning more about the interface between PCB Editor, Package Designer, and Sigrity tools!