• Discussion

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  6 replies
  Latest over 13 years ago
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• Discussion

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• Discussion

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  1 reply
  Latest over 13 years ago
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• Discussion

  Edit-Copy generates DRC "Line to thru pin spacing" errors Locked

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  2 replies
  Latest over 13 years ago
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• Discussion

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  1 reply
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• Discussion

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• Discussion

  Macro Channels Locked

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  0 replies
  Started over 13 years ago
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• Discussion

  *WARNING* QRC_HOME environmental variable is set but UI can't locate correct QRC installation Locked

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  3 replies
  Latest over 13 years ago
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• Discussion

  How to Simulate 64-bit VHDL Code in Cadence? Locked

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  0 replies
  Started over 13 years ago
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• Discussion

  Vertical vs Horizontal congestion Locked

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  0 replies
  Started over 13 years ago
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• Discussion

  Captab parameter plotting across voltage Locked

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  2 replies
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• Discussion

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  Latest over 13 years ago
  by jamynn
• Discussion

  related to allegro s/w Locked

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  0 replies
  Started over 13 years ago
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• Discussion

  SpectreMDL: creating own subroutines for repetitive tasks Locked

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  3 replies
  Latest over 13 years ago
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• Discussion

  Hai , Please help to set up the constrain manager Locked

  13045 views
  2 replies
  Latest over 13 years ago
  by steve