Aerospace and Defense Day

At the end of July, Cadence had its CadenceCONNECT Aerospace and Defense Day. For the rest of this post, I'm just going to say A&D for Aerospace and Defense. The focus of A&D Day was the same as a major focus of the Department of Defense (DoD): To teach the A&D industries how to adopt the electronic (especially semiconductor) design practices of the commercial world. Smartphone manufacturers and other market segments regularly produce designs on an annual cadence. Let's just say A&D takes longer.

The keynote for A&D Day was by Tom Beckley, who heads up a broad portfolio of product segments including custom IC, analog, packaging, and system analysis. He started by telling everyone that over the last few years, since 2016, Cadence has been working to drive best practices into multiple government agencies. Cadence is the only EDA company credited by the DoD as a "trusted supplier". 

As Tom said at one point in his presentation, if you did an analog or custom design anytime in the last 30 years or so, then you almost certainly used Virtuoso for layout and perhaps Spectre for circuit simulation. For some of the story of Virtuoso, see my post Happy 25th Birthday, Virtuoso! That post dated back to 2016, five years ago now, so I'm okay saying 30 years now. Core technology leadership and moving these products into the most advanced nodes remains an important area of investment.

But that was then, and this is now. There are simply a lot more areas in which we are investing (and we invest a lot, nearly 40% of Cadence's total revenue is invested in R&D):

Today, our focus is increasingly on system innovation. Both Virtuoso and Spectre are still part of the portfolio of products to deliver this vision, but now we have product focused on multiphysics system analysis, thermal solvers, software bringup, 3D-IC, RF (radios), and more. Tom showed the timeline below to highlight the internally developed products and recent acquisitions that go together to create this vision.

The products on this timeline are:

• Clarity 3D Solver for electrical analysis, our first massively scalable product. See my post Bringing Clarity to System Analysis.
• Not on the timeline, Spectre X. See my post Spectre X: Same Accuracy, New Speed.
• Celsius Thermal Solver for electrothermal analysis including conduction, radiation, thermal expansion, and more. See my post Celsius: Thermal and Electrical Analysis Together at Last.
• Our acquisition of the AWR product line from National Instruments. See my post Cadence to Acquire AWR.
• Our acquisition of Integrand and its EMX product. See my post Designing Radios: Integrand.
• Not shown on the timeline, Clarity 3D Transient Solver. See my post Electromagnetic Compliance: Anechoic Chamber Not Required.
• Our acquisition of InspectAR, combining augmented reality with PCB visualization. See my post InspectAR: Augmented Reality in Newfoundland.
• Our acquisition of computational fluid dynamics (CFD) specialist NUMECA. See my post Cadence to Acquire Computational Fluid Dynamics Company NUMECA.
• Sigrity X, next-generation signal-integrity and power-integrity analysis. See my post Announcing Sigrity X.
• Our acquisition of CFD meshing leader Pointwise. See my post Please Excuse the Mesh: CFD and Pointwise.
• Not on the timeline, Spectre FX FastSPICE. See my post Spectre FX: F Is for Fast, Really Fast.
• Inregration of Virtuoso RF with AWR Microwave Office. See my post AWR: Intelligent RF Design.
• Watch this space, more is on the way.

Another important area, one that was covered in a lot more detail later in the day, is 3D-IC. In particular, combining planning and building complex packages containing multiple chiplets (also called tiles), and then handling the electrical and thermal analysis of the complex multi-die system. This involves a combination of

• OrbitIO, the cockpit for driving any 3D-IC design, whether it is implemented in an Allegro (PCB), Virtuoso (custom), or Innovus (digital) environment.
• Celsius Thermal Solver, for combined thermal and electrical analysis.
• Voltus IC Power Integrity, to create chip thermal models for us in analyzing 3D-IC systems.

Another focus Tom talked about is machine learning (ML). He pointed out that in his group alone there are over 50 ML engineers (and hundreds across the whole of Cadence). In particular, the PCB ML revolution is coming, as shown in the above picture, with the goal of no-human-in-the-loop (NHIL) PCB and package design. For example, the interposer in the picture took 120 hours to route manually, but just 45 minutes when directed by neural networks (DL).

Tom wrapped up with a summary slide:

System innovation in multiphysics with improved finite element analysis and computational fluid dynamics, plus the move to heterogeneous 3D-IC integration, the so-called "More than Moore".

• Design excellence with improved verification throughput due to ML and computational logistics, and a ML-optimized digital full flow (the recently announced Cerebrus)
• Design IP enablers: high-speed SerDes (112G) and DDR IP.
• Tensilica processor IP for DSP, CPU, and ML applications.
• New use models in cloud and hyperscale data centers.

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