Dhiraj on Building the Dynamic Duo

When I rejoined Cadence in 2015, we had not yet announced Palladium Z1. But it was basically done, and we announced it a couple of months later. I wrote about the announcement in my post Palladium Z1, an Enterprise Server Farm in a Rack. Next, we created Protium X1 which I covered in my post Protium X1: FPGA Prototyping for the Enterprise. Since these two products are designed to work together with common compiler front ends, common accessories like SpeedBridge, we call them the dynamic duo. Since then we've created Palladium Z2 and Protium X2, which we announced together and that I wrote about in my post Dynamic Duo 2: The Sequel.

Since it's how it works in the emulation and prototyping world, there will obviously be future versions of these products ("bigger, faster, more gates"). And the person responsible for making this happen is Dhiraj Goswami, the GM and Corporate VP of R&D for the group. He was recently interviewed by Sudhir Nagarkar, a sales executive for the product line.

Since I have been writing Breakfast Bytes, I have been trying to get the hardware group to be a little less secretive. The series of chips that form the heart of Palladium are an incredible design...but nobody knows since we don't talk about it. The closest I've gotten is that I was actually asked to write a post about the chip in Palladium Z1 and I did so, but then it never got approved to go live. I realize that writing about any internal information risks informing the competition and that's why we don't do it.

Of course, I agree that a blog post about a chip is unlikely to sell any more products, but I think it is important for two reasons. One is that we design these chips with Cadence tools, eating our own dog food, as the saying goes. So the fact that we can design such impressive chips is an advertisement for both our design group and our design tools (and probably some IP). Elon Musk is quite open that the reason for having AI Days and revealing a lot about how advanced is the work they are doing, is to attract potential hires. So that is a second reason for us to do the same. I think hiding our light under a bushel is not the best approach. Obviously, not the official Cadence position, plus I have a blog, so a lot of my job is to lift up bushels and expose the interesting lights underneath. I was recently at HOT CHIPS, and I keep lobbying for our chips to appear there, too.

Anyway, Dhiraj isn't going to tell you how many gates are on those chips or what process generation they are. But he does reveal a bit more about how the development is done and how the team is managed.

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