Today is Samsung's SAFE Forum 2019 at their Samsung@First building on San Jose's First Street. SAFE stands for Samsung Advanced Foundry Ecosystem. Since Samsung Foundry really only has two events per year, the other being the Samsung Foundry Forum (SFF) in Spring, I expect that there will be updates on process roadmaps, too.

Advanced warning if you are going: since Samsung is providing Lyft vouchers when you register, I'm assuming that parking will be very limited. It's probably a good idea to plan not to drive there.

Digital

Cadence made several announcements this morning. Actually, the first one was announced last week at Arm TechCon. Cadence, Arm, and Samsung collaborated to deliver a next-generation processor core in Samsung's next-generation 5nm process using Cadence's digital implementation and signoff full flow, optimized for 5LPE. The Arm core was named "Hercules" and presumably will eventually have one of those numbers that Arm seems to pick seemingly at random. (Even Simon Segars, Arm's CEO, confessed to me once that he's given up trying to understand his company's numbering system.) A corresponding Rapid Adoption Kit (RAK) has also been developed to make the 5LPE flow used available to customers.

Custom and AMS

Today, it was custom and analog's turn. Cadence announced that its custom and analog/mixed-signal IC flow has achieve certification in the Samsung 5nm 5LPI process. Along with the digital flow already announced, that gives mutual customers of Cadence and Samsung access to the full portfolio of Cadence tools for use with 5LPE designs.

Packaging

But what about packaging? Well, we've got you covered there, too.

This morning Cadence also announced the complete integrated 3D-IC advanced packaging integration flow has achieved certification for the Samsung Foundry Multi-Die-Integration (MDI) packaging flow. The reference flow was developed in collaboration with Samsung Foundry to provide mutual customers with a full planning, implementation, and analysis flow for 3D multi-die packages.

The use of stacked chips in a single package is becoming a key trend. For a whole gamut of examples from August's HOT CHIPS conference, see my post HOT CHIPS: Chipletifying Designs. For an introduction to 3D packaging, and the technologies that often go under the rubric More than Moore, see my post Advanced Packaging Needs Advanced Tools. I'm sure there will be many posts on this topic in the rest of 2019 and future 2020 Breakfast Bytes posts.

The Samsung Foundry MDI technology enables customers to make use of Cadence's analysis, implementation, and physical verification capabilities within a single canvas and offers unique, early-stage system-level pathfinding and highly complex design capabilities for 3D signoff.

SAFE Agenda

If you are going to SAFE, registration opens at 9:00am. The general session starts at 10:30am. There is a networking reception from 5:10pm to 7:00pm, presumably where the partner exhibits are. Drop by and visit Cadence.

Sign up for Sunday Brunch, the weekly Breakfast Bytes email.