Custom IC Design Blogs

As promised, here is my next blog in the Virtuoso^® Automated Device-Level Placement and Routing series. In my previous post, I spoke about the need for a fully Automated Device-Level Placement and Routing solution in the analog and full custom space. In this blog, I'll delve into an important step in this process—identifying device groups and topologies for placement and routing.

The Challenges

At its core, analog design is about precision and matching. The various design parameters, whether gain, power dissipation, voltage swing, or noise, have a strong dependence on the actual physical implementation, requiring the critical circuit topologies to be laid out in a specific manner. Also, fundamental to analog layout are symmetric structures, which are typically associated with differential inputs and outputs and are used for matching, in general.

We also know that in advanced node processes, the number of actual physical devices have grown significantly due to the process requirements and restrictions, resulting in a need to group and array such devices. 

Our Solution

The automated device placement and routing solution in Virtuoso addresses these requirements in the constraint generation step after layout initialization. The dedicated Constraints tab in the Auto Device P&R Assistant accomplishes this through a representative set of circuit finders that identify circuit topologies of importance. This includes special structures and configurations that are more common in advanced node processes. The associated devices are created as groups. Symmetry constraints are created for structures that need to be symmetric. Here's an image that depicts the process flow:

In addition to providing a fully automated approach to identifying device groups and creating constraints, the Constraints tab of the Auto Device P&R Assistant provides full control over the groups and constraints, including the ability to capture user-defined groups.

In a Nutshell

In summary, the automated device placement and routing solution helps ensure that the device groups and constraints, which are fundamental to analog layout, are handled in an automated manner. The solution also provides options for customization by providing the flexibility and choice to cater to specific design requirements.

In a subsequent blog in this series, we will see how these device groups and constraints are consumed by the automatic device placer to generate optimal placement.

Related Resources

Blog

• Virtuosity: Introducing Automated Device Placement and Routing in Virtuoso

Rapid Adoption Kits:

• Automated Device-Level Placement and Routing Flow for Advanced Nodes 
• Automatic Device-Level Routing in Advanced Nodes: Tree Route Flow 

Flow Guide:

• Virtuoso Automated Device-Level Layout Flow Guide

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuosity

Virtuosity has been our most viewed and admired blog series for a long time that has brought to fore some lesser known, yet very useful software and documentation improvements, and also shed light on some exciting new offerings in Virtuoso. We are now expanding the scope of this series by broadcasting the voice of different bloggers and experts, who would continue to preserve the legacy of Virtuosity, and try to give new dimensions to it by covering topics across the length and breadth of Virtuoso, and a lot more… Click Subscribe to visit the Subscription box at the top of the page in which you can submit your email address to receive notifications about our latest Virtuosity posts.

Happy Reading!

- Sravasti Nair