Virtuoso Meets Maxwell: Export the Die? What Am I Exporting? To Where?

'Virtuoso Meets Maxwell' is a blog series aimed at exploring the capabilities and potential of Virtuoso RF and Virtuoso MultiTech. So, how does Virtuoso meet Maxwell? Now, Virtuoso supports RF designs, and the RF designers measure the physical and radiation effects by using the Maxwell's equations. In addition to providing insights into the useful software enhancements, this series broadcasts the voices of different bloggers and experts about their knowledge and experience of various tools in the Virtuoso IC-Packaging world along with the nuances of RF, microwave, and high frequency designs. We are posting on Mondays.

Here I come back with another episode of TILP of the Virtuoso^® Meets Maxwell series! In my earlier post TILP! What's A TILP?, I introduced the concept of Technology Independent Layout Pcell (TILP). Today we are going to create a TILP, which is used in the package design, from a die. This die can be referred alongside package when you enable Edit-In-Concert^TM.

Let's get started with preparing the die for export.

Die Data Preparation

Every die connects to a package through a C4 bump, a bondpad, and sometimes both. Of course, there are other options to connect, such as through Silicon Vias, but for now, we'll focus on bumps and pads. For Virtuoso RF, you need to specify the bump or bondpad as a specific cell type to ensure that while exporting the die, the hierarchy can be traversed easily to find the location of every bump cell. There is no need to have all bumps or pads in the same cell.

Step 1- Open the bump layout or bondpad layout and modify the cellview properties to set the CellType for the appropriate connection.  For C4 bumps, the CellType is coverBump and for bondpad, it is pad.  Refer to the images below, where I have opened a BUMP_CELL and bond_pad layouts. Using the Shift+Q  bindkey, you can edit the cell properties and change the CellType to coverBump or pad. 

Step 2- Check the layer in which the pin is located in the bump or bondpad cell by selecting the pin and using the Q bindkey to view the Edit Rectangle Pin Properties form.

In this example, the pin is on the Metal11 drawing layer. We use this information in the Export Die form. There is a need to have the connectivity from the bump cell to the top cell in the die.

Step 3- Open the layout of the top cell assuming that we have the connectivity to the top cell in the die, which includes the schematic and symbol of the top cell.

Step 4- Launch Layout EXL from the top cell layout.

Now, we proceed for exporting the die.

Die Export

Step 5- On the menu bar of the layout window, click RF-Module – Export Die. It opens the Export Die form.

You can spot two tabs in the Export Die form, Inputs and Outputs. On the Inputs tab, you specify the layer where the pin is located in the bump cell or the pad cell. On the Outputs tab, you specify the name of the library that is created to include the TILP, schematic, and symbol for use in our package schematic.

Step 6- Click OK and you'll see some messages in the CIW that inform you that a schematic, symbol, and a layout with IO cells have been created.

Subsequently, on checking the Library Manager, you'll see the abstract, layout, schematic, and symbol views.

Congratulations! You just created your own TILP of the die for package design. Now, as Jordan Peterson says, to master a new technology, you have to play with it.

To summarize the steps for exporting the die:

Preparing for Die Export

1. Check for the cell type in the bump cell.
2. Check for the pin layer in the bump cell.
3. Ensure that the connectivity with the top cell is in place.
4. Ensure that the top layout cell contains the schematic and symbol.

Exporting the Die

1. Check the pin layer purpose pair in the Export Die form.
2. Specify the new library, which has an independent technology file associated, in the Export Die form for your TILP, schematic, and most importantly, the symbol of the die.

Related Resources

• Virtuoso RF Solution
• What’s New in Virtuoso (ICADVM18.1 Only) 

For more information on Cadence circuit design products and services, visit www.cadence.com.

About Virtuoso Meets Maxwell

Virtuoso Meets Maxwell series includes posts about the next-generation die, package, and board design flow with a focus on reinventing and optimizing the design process to ensure that the designer remains a designer! Keep watching!

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Kerry Judd