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Featured

Virtuoso Studio IC25.1 ISR1 Now Available

Virtuoso Studio IC25.1 ISR1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 27 Aug 2025 • 1 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement

Virtuoso Studio IC23.1 ISR15 Now Available

Virtuoso Studio IC23.1 ISR15 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 23 Jul 2025 • 2 min read
featured , Virtuoso Studio , IC Release , IC Release Blog Announcement , Virtuoso

Virtuoso Studio IC25.1 Now Available

Virtuoso Studio IC25.1 production release is now available for download.

Virtuoso Release Team
Virtuoso Release Team 3 Jul 2025 • 17 min read
IC25.1 , featured , Cadence blogs , Virtuoso Studio , IC Release Blog Announcement
Analog/Custom Design

Latest blogs

Is China Ready for Next Generation Mixed-signal Design?

A Chinese design engineer told me that his manager once told him: "You do not have…

QiWang 18 Mar 2011 • 4 min read
China , mixed-signal ToT , tech on tour , abstraction , EDA360 , analog , Mixed-Signal , Convergence , intent , japan , Silicon Realization , mixed signal , SoCs

Rapid Analog Prototyping - Handcrafted Layout Gets a Needed Productivity Boost

As more and more custom/analog designs migrate to advanced process nodes (<65nm)…

mrkelly 17 Mar 2011 • 4 min read
AMS , parasitic-aware design , PAD , RAP , Virtuoso IC6.1.5 , custom/analog , PCells , Advanced Node , analog , Constraint-driven , IC 6.1.5 , Mixed-Signal , Virtuoso , rapid analog prototyping , Custom IC Design , modgens , Virtuoso Layout Suite , parasitics

Early Analysis is Key – Parasitic-Aware Design

Decreasing geometries and increasing design complexity are making the task of designing…

archive 16 Mar 2011 • 3 min read
parasitic-aware design , Analog Design Environment , PAD , Virtuoso IC6.1.5 , IC 6.1.5 , ADE , Virtuoso , ADE-GXL , ADE-XL , parasitics

Virtuoso IC6.1.5: Software and Fine Red Wine

Software, like fine red wine, can get better with age as well -- but it requires…

NewYorkSteve 14 Mar 2011 • 7 min read
AMS , parasitic-aware design , Low Power , Virtuoso IC6.1.5 , custom/analog , Analog Simulation , analog , Constraint-driven , IC 6.1.5 , Mixed-Signal , Virtuoso , mixed signal , Custom IC Design , DFM , parasitics

Q&A: IBM Modeling Team Describes Advanced SOI Qualification Flow In Cadence MMSIM…

Circuits implemented using sub-micron technologies require designers to meet tighter…

archive 23 Feb 2011 • 9 min read
APS , characterization , Compact Modeling Council , model qualification , IBM , MMSIM , Monte Carlo , spectreMDL , Spectre , CMC , SOI , Custom IC Design , Spice model verification , BSIMSOI

Analog Assertion Based Verification Methodology – Reality or a Dream? (Part 2)

The design and verification methodology for analog circuits has not changed much…

archive 9 Feb 2011 • 3 min read
ABV , assertion-based , Analog Simulation , analog , SoC , Mixed-Signal , SVA , PSL , AMS simulation , assertions , mixed signal , wreal , Custom IC Design , verification

Advanced Mixed-Signal Designs Demand a Unified Methodology

Mobile, automotive, consumer and medical applications require the productive realization…

nizic 6 Feb 2011 • 4 min read
conformal , RF , mixed-signal seminars , Low Power , CPF , abstraction , analog , ECOs , Mixed-Signal , Convergence , intent , Silicon Realization , mixed signal , signoff , SoCs

SKILL for the Skilled: Continued Introduction to SKILL++

In my previous posting , which provided an introduction to SKILL++, I showed a simple…

Team SKILL 25 Jan 2011 • 6 min read
Team SKILL , hierarchy , walkCvHier , IC 6.1.5 , Virtuoso , flet , Lisp , Custom IC Design , SKILL++ , SKILL

Analog Assertion Based Verification Methodology – Reality or a Dream? (Part 1)

There is no doubt in my mind that assertions will play a significant role in analog…

archive 24 Jan 2011 • 4 min read
SystemVerilog , AMS , ABV , assertion-based , coverage , analog , Constraint-driven , Mixed-Signal , SVA , Verilog , assertion , ADE-GXL , PSL , assertions , random , MDV , Custom IC Design

SKILL for the Skilled: What is SKILL++?

The way SKILL++ deals with functions is a bit different than the way traditional…

Team SKILL 4 Jan 2011 • 5 min read
Team SKILL , hierarchy , Virtuoso , Lisp , Custom IC Design , SKILL++ , SKILL , Allegro

On-Demand Webinar: Parasitic-Aware Design Part 3 -- Managing Parasitics in Back …

If you were not able to attend this recent live webinar, or were able to and would…

mrkelly 28 Dec 2010 • less than a min read
analog , Virtuoso , Custom IC Design , parasitics

On-Demand Webinar: Parasitic-Aware Design Part 2 -- Managing Parasitics in Front…

If you were not able to attend this recent live webinar, or were able to and would…

mrkelly 21 Dec 2010 • less than a min read
analog , Virtuoso , Custom IC Design , parasitics

On-Demand Webinar: Parasitic-Aware Design Part1 -- A Complete Analog Design Flow

If you were not able to attend this recent live webinar, or were able to and would…

mrkelly 17 Dec 2010 • less than a min read
analog , Virtuoso , Custom IC Design , parasitics

Making Friends With Parasitic Effects

OK, so the title is perhaps a little optimistic but I'm playing off the saying …

archive 13 Dec 2010 • 2 min read
PAD , Bleasdale , analog , ADE , Virtuoso Analog Design Environment , Virtuoso , ADE-GXL , ADE-XL , Parasitic analysis , Custom IC Design , parasitics

SKILL for the Skilled: Rule of English Translation

An obvious criticism of my previous post SKILL for the Skilled: Making Programs…

Team SKILL 6 Dec 2010 • 3 min read
Team SKILL , English translation , Norvig , Lisp , Custom IC Design , SKILL , clarity

Video Demo -- Increase Simulation Accuracy and Efficiency With SpectreMDL

MDL is an immensely powerful feature in our simulators that allows designers to run…

archive 24 Nov 2010 • less than a min read

Video Demo -- Increase Simulation Accuracy and Efficiency With SpectreMDL

Measurement Description Language (MDL) is an immensely powerful feature in our simulators…

archive 23 Nov 2010 • less than a min read
analog , Virtuoso , spectreMDL , Spectre , MDL , Custom IC Design

SKILL for the Skilled: Making Programs Clear and Concise

The SKILL programming language augments Cadence core tool functionality for Virtuoso…

Team SKILL 8 Nov 2010 • 3 min read
Team SKILL , programming , analog , Virtuoso , Custom IC Design , SKILL , Allegro

Things You Didn't Know About Virtuoso: ADE XL--Take This Job and...Run It!

Sometimes these articles just write themselves... Last week, 3 different people asked…

stacyw 6 Oct 2010 • 3 min read
Analog Simulation , analog , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

Now Playing: Custom IC Videos-to-Go

I wanted to take a brief detour from my usual postings to point out a couple of new…

stacyw 27 Sep 2010 • 3 min read
IC 6.1 , analog , ADE , Virtuoso Analog Design Environment , Virtuoso , ADE-GXL , ADE-XL , IC 6.1.4 , Custom IC Design

Things You Didn't Know About Virtuoso: ADE XL -- Where Did My Data Go?

Last week I got to attend a "Social Media Summit" here at Cadence. Jeepers, a "summit…

stacyw 21 Sep 2010 • 3 min read
Analog Simulation , analog , ADE , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

Things You Didn't Know About Virtuoso: Outputs Setup in ADE XL

Continuing on our exploration of ADE XL (see here and here for previous articles…

stacyw 25 Aug 2010 • 5 min read
IC 6.1 , Analog Simulation , analog , ADE , Virtuoso IC 6.1.3 , Virtuoso Analog Design Environment , Virtuoso , ADE-GXL , ADE-XL , IC 6.1.4 , Custom IC Design

Analog Design vs. Automation -- Why Are They At Odds?

Back in 2002 and 2003 there was a lot of talk about analog synthesis being the …

archive 17 Aug 2010 • 2 min read
IC 6.1 , Bleasdale , analog , ADE , Virtuoso Analog Design Environment , optimization , Virtuoso , ADE-GXL , ADE-XL , Parasitic analysis , Circuit Design , Custom IC Design

Things You Didn't Know About Virtuoso: ADE XL Test Setup

In my last post , I left you in suspense, with your mouse hovering over the words…

stacyw 5 Aug 2010 • 4 min read
IC 6.1 , ADE , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

Things You Didn't Know About Virtuoso: ADE XL

I know, it's been a long time since my last post. You see, we've finally arrived…

stacyw 27 Jul 2010 • 5 min read
IC 6.1 , ADE , Virtuoso IC 6.1.3 , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

ARM And Cadence Get To The “Core” Of Mixed-Signal Design

An increasing number of analog and mixed-signal designs in automotive, power management…

nizic 8 Jun 2010 • 4 min read
Cortex , analog , Mixed-Signal , Virtuoso , Cortex-M0 , mixed signal , ARM

Things You Didn't Know About Virtuoso: It's Video Time!

Just a quick post to let you know that there have recently been a whole truckload…

stacyw 1 Apr 2010 • 1 min read
IC 6.1 , Virtuoso Analog Design Environment , Virtuoso , ADE-XL , IC 6.1.4 , Custom IC Design

Video Demo: Your Maiden Voyage Across OCEAN

I still remember my first encounter with OCEAN. It was 2002 and my co-worker had…

archive 29 Mar 2010 • 1 min read
OCEAN-XL , ocean , ADE , Spectre , ADE-XL , Custom IC Design , SKILL
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