Featured

Cadence RTL Design Studio: Built for the Full PPAC Journey

If you've used Joules RTL Design Studio, you already know what it can do. Now it…

raquelp
• 2 min read
Digital Design and Signoff , featured , Joules , Digital Implementation , rtlstudio

Cadence Welcomes Ausdia and TimeVision Timing Constraints Management Solution

We're delighted to welcome Ausdia to Cadence. Effective April 16, 2026, Ausdia's…

Corporate
• 2 min read
digital design , Digital Design and Signoff , featured , Tempus timing solution , Timing analysis

Himax Accelerates Chip Design with Cadence Cerebrus Intelligent Chip Explorer

Himax Technologies Inc ., a leading supplier and fabless manufacturer of display…

Vinod Khera
• 2 min read
featured , Cadence Cerebrus Intelligent Chip Explorer , Digital Implementation , AI/ML
Digital Design
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Who Designed the iPhone?

When people ask you what you do for a living, is your response as clumsy as mine…

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Digital Implementation , iPhone

Statistical Timing Analysis - Has its time arrived?

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• 2 min read
Static timing analysis , STA , Digital Implementation , SSTA , corner analysis

Customer Experiences With Low-Power Design

Hello and welcome to the new Cadence community site, and my first blog post. You…

• 4 min read
Low-Power , Logic Design , Digital Implementation , The Power Forward Initiative

The Case for Robust Database Access

The most frequently viewed forum post in the old cdnusers.org "Digital IC->Floorplanning…

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First Encounter , Hierarchical Module Ports , robust data access , Digital Implementation , CTS
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