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Featured

Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
Corporate 19 Jun 2025 • less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium

Time on Your Side: Launching PSS Perspec Composer

We all agree that time is precious. As PSS ( Portable Stimuli Standard ) models get…

OK202502201742
OK202502201742 11 Mar 2025 • 3 min read
featured , Perspec , pss , portable stimulus

Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)

USB Promoter Group has released the eUSB2® Version 2.0 specification (eUSB2v2) in…

Sanjeet Kumar
Sanjeet Kumar 17 Jan 2025 • less than a min read
Verification IP , eUSB2v2 , featured , Functional Verification , USB
Verification

Latest blogs

A Personal History of Functional Verification

In my most recent blog post , I summarized some of the key points from an October…

tomacadence 18 Nov 2016 • 4 min read
ASIC , uvm , pswg , formal. Verisity , Functional Verification , System Design and Verification , OVM , System Development Suite , constrained-random , Simulation acceleration , Accellera , metric-driven verification , Virtual Platforms , Hardware/software co-verification , simulation , FPGA , System Design and Verification

Analog Devices Promotes Portable Stimulus at DVClub

If you’re not familiar with the series of DVClub events held in North American, Europe…

tomacadence 3 Nov 2016 • 3 min read
Analog Devices. ADI , pswg , cadence , debug , System Design and Verification , Dave Brownell , software , Accellera , System Design & Verification , portable stimulus , System Design and Verification , verification

Genie in a Mouse Click: Indago Protocol Debug App

Do you remember what life was like before the internet and smart phones? If you wanted…

Priyab 2 Nov 2016 • 4 min read
Productivity Tool , Verification IP , and Verification IP' , VIP , Indago Protocol Debug App , design , 'Tensilica

DVCon(x2), DVClub(x2): Portable Stimulus Is Everywhere

In my most recent blog post , I talked about the industry vision for portable stimulus…

tomacadence 21 Oct 2016 • 4 min read
horizontal reuse , DAC , uvm , prototyping , pswg , Perspec , System Development Suite , DVClub , Emulation , DVcon , Accellera , portable stimulus , simulation , System Design and Verification

The Industry Vision for Portable Stimulus

As I mentioned in my last blog post , portable stimulus is one of the main areas…

tomacadence 7 Oct 2016 • 3 min read
uvm , pswg , Acceleration , Perspec , virtual platform , System Design and Verification , Emulation , System simulation and analysis , Accellera , FPGA prototypes , testbench , portable stimulus , silicon , verification

A Winning Strategy: Ethernet 10Base-T to Ethernet 400G!

Ethernet was developed in the 1970s and has been a viable communications protocol…

annkeffer 3 Oct 2016 • 2 min read
Verification IP , 802.3bs , 25G Ethernet , VIP , Ethernet standards , IEEE 802.3 , Ethernet , future of IP , CHI VIP , Ethernet 400G

What is ISO 26262 and Why Should I Care?

ISO 26262 is a functional safety standard applied to the development of electrical…

RChilders 29 Sep 2016 • 3 min read
Automotive , functional safety , cadence , ISO 26262

Back in the Saddle Again

Nearly five years ago, I signed off with my last blog post in the Cadence Community…

tomacadence 23 Sep 2016 • 3 min read
pswg , Perspec , System Design and Verification , System simulation and analysis , Accellera , portable stimulus , System Design and Verification , verification

DisplayPort 8K in Olympics 2020

If you’re anything like me, you’ve spent the last couple of weeks glued to the TV…

Priyab 31 Aug 2016 • 3 min read
Verification IP , VIP , DisplayPort , Design and Verification IP , Olympics

Coverage Maximization

Searching for “automatic coverage maximization” results with ~16 million hits. Alas…

teamspecman 24 Aug 2016 • 4 min read
Specman , coverage , Functional Verification , Testbench simulation , Coverage-Driven Verification , CDV , e , e language , Funcional Verification , team specman , specman elite , verification

10 New Protocols to Design and Integrate Your SoC in Record Time

This month we released 10 new Verification IP for leading-edge protocols! Did I say…

annkeffer 16 Aug 2016 • 1 min read
SPI NAND , Verification IP , VIP , MIPI , DisplayPort , USB , DSI , octal spi , Ethernet , Tensilica , design , Type-C , and Verification IP , USB UFS

The Evolution of MIPI DSI

The MIPI DSI specification has come a long way from the days of its early introduction…

Priyab 10 Aug 2016 • 2 min read
Verification IP , MIPI Alliance , IoT , VIP , MIPI , DSI , Tensilica , design , Internet of Things , and Verification IP

Doing Away With the Docking Station

My docking station with the rat’s nest of wires dangling from behind it could be…

Priyab 20 Jul 2016 • 2 min read
USB 3.0 , Verification IP , Docking station , Tensilica Design and Verification IP , VIP , DisplayPort , USB , power delivery , USB3.0 , USB 2.0 , Type-C , USB connector , Alternate Mode , USB 3.1

Fine Tuning of Coverage Model Definition

Functional Coverage is one of the main means to measure the quality and progress…

teamspecman 14 Jul 2016 • 8 min read
funtional verification , Specman , coverage , Functional Verification , Coverage-Driven Verification , CDV , e , e language , Funcional Verification , team specman , Verification IP modeling , metric-driven verification , MDV

Why Do We Need a Verification Language?

This month, we celebrate the 20 th anniversary of Specman’s introduction to the public…

teamspecman 21 Jun 2016 • 4 min read
Specman , e , Aspect Oriented Programming , yoav hollander , verification

IP Group @ 53rd DAC – Veni Vidi Vici

Another DAC, and this year someone put a jalapeno in my margarita at the Denali Party…

Steve Brown 17 Jun 2016 • 2 min read
DAC , Verification IP , IP , DDR4 , LPDDR4 , SerDes

How to Find Where Declared e Entities Are Used

The e Reflection API allows you to perform various queries on entities in your own…

teamspecman 5 Jun 2016 • 4 min read
IEEE 1647 , funtional verification , Specman , Functional Verification , e , e language , Funcional Verification , specman elite , IES

How to Maximize Your Verification Experience at DAC 2016

Next week will mark the annual EDA gathering in Austin. For me it is my 20th DAC…

fschirrmeister 2 Jun 2016 • 13 min read
dac2016 , DAC , Verification Computing Platform , Protium , Palladium , Prtable Stimulus

Simulation Acceleration—Maximizing Simulator Performance

"Simulation Acceleration” or “Accelerated Verification” are terms commonly used to…

teamspecman 25 May 2016 • 4 min read
Specman , Functional Verification , e , specman elite , verification

Building Efficient Scoreboards

A “scoreboard” is a verification component that checks the data sent to the DUT against…

teamspecman 18 Apr 2016 • 7 min read

RTL Signoff vs. Functional Signoff

The notion of signoff has many layers to it, both in terms of complexity but also…

John Brennan 14 Apr 2016 • 4 min read
funtional verification , IMC , metric driven verification (MDV) , functional coverage , MDV , vManager

Modelling a Value Holder Template with the Value “new-ed” by Default

In many companies, there is a well-defined flow for handling monitored data items…

teamspecman 11 Apr 2016 • 2 min read
IEEE 1647 , Specman , tech tips , e , e language , specman elite , Aspect Oriented Programming , AOP , verification

How to Handle a Binding Catastrophe

Are you busy debugging your environment topology and coming up against components…

teamspecman 28 Mar 2016 • 3 min read
Specman , TLM , binding

e Templates – Cool Tool, Now Even Cooler

One of the reasons why verification engineers love e is the power it gives them as…

teamspecman 23 Mar 2016 • 3 min read

UVM-ML OA: Now Within Incisive Platform As Well!

Open-source software has many advantages. In short: you can see it (the code), you…

teamspecman 22 Feb 2016 • 3 min read
Specman , UVM-ML OA , Incisive , multi-language

Functional Verification Closure—Are We Done Yet?

In my job as product marketing director for vManager and MDV, I get to hear this…

John Brennan 12 Feb 2016 • 4 min read
methodology , verification strategy , Functional Verification , Metric Driven Verification , vPlan , Incisive , Plan and metrics management , vManager

Using Tables to Handle Configurability in Incisive Enterprise Specman

Most, if not all, designs which are being verified today are configurable. This is…

teamspecman 20 Jan 2016 • 2 min read
IntelliGen , configurable designs , Specman , tech tips , Funcional Verification , Incisive Enterprise Specman

Cheating Tetris

Remember Tetris? We’ve all played it at some point in our lives. You know, the game…

rmathur 24 Nov 2015 • 2 min read
Verification Computing Platform , Palladium , Tetris , Emulation
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