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Cadence Welcomes VLAB Works

Cadence welcomes VLAB Works, a division of Australian Semiconductor Technology Corporation…

Corporate
• less than a min read
Automotive , featured , Virtual Development Environment , vlab , Protium

Time on Your Side: Launching PSS Perspec Composer

We all agree that time is precious. As PSS ( Portable Stimuli Standard ) models get…

OK202502201742
• 3 min read
featured , Perspec , pss , portable stimulus

Cadence Announces Industry's First Verification IP for Embedded USB2v2 (eUSB2v2)

USB Promoter Group has released the eUSB2® Version 2.0 specification (eUSB2v2) in…

Sanjeet Kumar
• less than a min read
Verification IP , eUSB2v2 , featured , Functional Verification , USB
Verification

Latest blogs

2010 CDNLive Silicon Valley Photo Blog: Silicon Realization, ABV, OVM, MDV, Specman…

If you are running short on time and can't view all the videos of the 2010 CDNLive…

• less than a min read
SystemVerilog , Cadence Connections , NextOp , AMS , uvm , Specman , ABV , Zocalo , verification strategy , CDNLive , Functional Verification , Formal Analysis , formal , OVM , EDA360 , Mixed Signal Verification , e , SoC , SVA , ISX (Incisive Software Extensions) , Silicon Realization , AMIQ , assertion synthesis , Aspect Oriented Programming , ISX , MDV , IEV , IFV , AOP

The Amazing Diversity of the SoC Conference

Although I attend a number of conferences and tradeshows each year, most of these…

• 3 min read
SOC Conference , uvm , Multi-Core , SoC , multicore , yield , verification

Using Scoreboards and Virtual Platforms for Software Verification

Today I'm running a guest article written by Henry Von Bank of Posedge Software …

• 4 min read
scoreboards , software verification , virtual platforms , posedge , virtual prototypes , Incisive , ISX , System Verification , linux

Verification Goldmine: 50 User Papers on Formal, Multi-Engine, and Assertion-Based…

With all due respect to our Tech Pubs writers, Solutions Architects, and contributors…

• 8 min read
verifier , DAC , ABV , methodology , CDNLive , metric driven verification (MDV) , debug , Functional Verification , Formal Analysis , formal , Incisive , SVA , Silicon Realization , PSL , DVcon , AMBA , MDV , IEV , IFV

CDNLive! Silicon Valley 2010 in the Rear-View Mirror

Well, we all survived another very busy CDNLive! event last week. Since I posted…

• 2 min read
uvm , CDNLive , OVM , EDA360 , MDV , techtorial , verification

User Views -- Migrating From FPGA-Based Prototyping to Palladium

In recent posting published by John Cooley on Deepchip.com, users compared FPGA-based…

• 1 min read
emulator , deepchip , prototyping , Palladium , Emulation , Cooley , FPGA

The Increasingly Hazardous World of FPGA Verification

Last week saw the publication of two interesting blog posts regarding the growing…

• 3 min read
uvm , Verification methodology , Functional Verification , Formal Analysis , OVM , FPGA

CDNLive! -- Israel and the U.S.

The Cadence Design Network provides a great way to learn about the latest design…

• 1 min read
CDNLive , system realization , Emulation , software , Israel , CDNLive! , embedded , System Design and Verification

Android, Linaro, and 10 Other Useful Embedded Linux Links

The state of Minnesota is unofficially divided into two parts; The Cities and The…

• 1 min read
android , System Design and Verification , linaro , software , linux , Embedded Linux , embedded

e Templates and e Macros -- An Update for Specman Users

A couple of recent blogs have mentioned the feature of e templates, which was added…

• 2 min read
Specman , Functional Verification , Incisive , e , team specman , macros , AOP , IES-XL

Team Verify at CDNLive Silicon Valley Next Week – ABV, Formal, Multi-Engine Verification…

At next week's CDNLive! Silicon Valley in San Jose, California, Cadence will cover…

• 1 min read
NextOp , IP , ABV , methodology , Zocalo , CDNLive , Functional Verification , Formal Analysis , formal , EDA360 , Incisive , Silicon Realization , assertion synthesis , IEV , IFV

A Preview of Verification Sessions at CDNLive! Silicon Valley

As Cadence followers well know, our annual worldwide series of CDNLive! events is…

• 2 min read
uvm , ABV , CDNLive , OVM , MDV , techtorial , verification

Connections Partner NextOp on Assertion Synthesis and Assertion-Based Verification…

As anyone working in Formal and Assertion-Based Verification (ABV) knows, the task…

• 1 min read
Cadence Connections , NextOp , ABV , CDNLive , Functional Verification , formal , EDA360 , assertion synthesis , IEV , IFV

Video: Interview With NextOp CEO Yunshan Zhu on Assertion-Based Verification (ABV…

What makes a startup "hot"? To be sure, trade press and blogger attention helps.…

• 1 min read
Cadence Connections , NextOp , DAC , ABV , CDNLive , Functional Verification , Formal Analysis , formal , EDA360

"We Want UVM 1.0! When Do We Want it? Now!"

Short of holding signs and yelling slogans, the 12 customers I visited in the past…

• 3 min read
SystemVerilog , uvm , OVM ML , OVM , VIP , OVM e , EDA360 , Incisive , OVM SV , AMIQ , Accellera VIP TSC , IES , VMM , IES-XL

Why EDA Verification is Like Pro Sports

First, I would like to introduce myself. My name is Jim Kjellsen. I've recently joined…

• 2 min read
Functional Verification , football , pro sports , sports , Kjellsen , verification

Tech Tip: Distributing Incisive Enterprise Verifier (IEV) Engines and Assertions…

A common problem when distributing engines and assertions in Incisive Enterprise…

• 1 min read
ABV , Functional Verification , Formal Analysis , formal , LSF , Enterprise Manager , IEV

A Quick Check on the Status of UVM 1.0

Regular readers know that I've blogged a lot about the Open Verification Methodology…

• 2 min read
uvm , Verification methodology , OVM , VIP , Accellera VIP TSC

Will Your Next System Project Succeed?

Will you have the System Realization tools you need? Will you know how to apply them…

• 3 min read
TLM , webinars , system realization , TSMC , services , ARM , ESL , System Design and Verification

Video: Report From The Front Lines Of The Silicon Valley Electronics Industry With…

Lately the tone of the trade press and blogs about the Silicon Valley electronics…

• less than a min read
uvm , Functional Verification , Formal Analysis , formal , OVM , EDA360 , Chu , verification

e Templates and Aspect Oriented Programming

In a recent blog - " e Templates: A Nifty Way To Create Reusable Code ", Corey Goss…

• 2 min read
Specman , EDA , e , team specman , Aspect Oriented Programming , AOP , IES-XL

The Best C++ Debugger is Not the Best SystemC Debugger

I mentioned in a previous article that I have two girls who are excellent debaters…

• 7 min read
virtual platforms , windows , TLM 2.0 , SystemC , Visual Studio , C++ , debugging

All I Really Need to Know About MDV I Learned From Hollywood - Part 3

This is my third and final blog entry in a series using quotes from famous Hollywood…

• 3 min read
vPlan , verification planning , metric-driven verification , Hollywood , MDV , IP modeling , verification

Tech Tip: Save Steps With Automatic Witness Checks

This is just a quick reminder that the "witness_check" define command has an option…

• less than a min read
ABV , Functional Verification , Formal Analysis , formal , IEV , IFV

Users Employ Specman Constrained-Random Verification for Complex IP

Two recent customer examples have shown the effectiveness of Specman constrained…

• 1 min read
SystemVerilog , Specman , metric driven verification (MDV) , Cadence VIP portfolio , VIP , Coverage-Driven Verification , EDA , Funcional Verification , Incisive Enterprise Simulator (IES) , AOP , IES-XL

Performance Tips and Tricks: Coding e Ports for Enhanced Performance

This blog entry builds on last week's Tips and Tricks posting in which we discussed…

• 3 min read
IntelliGen , Specman , vr_ad , OVM-e , Funcional Verification , team specman , AOP , IES-XL

Join Us at FMCAD October 20-23

Are you deeply interested in formal and assertion-based verification technology?…

• less than a min read
Alok Jain , ABV , Functional Verification , Formal Analysis , formal , FMCAD , IEV , IFV

All I Really Need to Know About MDV I Learned From Hollywood - Part 2

My last blog entry began a series using quotes from Hollywood movies to illustrate…

• 2 min read
vPlan , verification planning , Verification IP modeling , metric-driven verification , MDV
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