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Featured

DesignCon 2025 Highlights and Papers on Demand

The Cadence MSA team had a GREAT DesignCon highlighting how Cadence can help you…

MSATeam
• 2 min read
featured , DesignCon , Advanced IC packaging , PCB design

Designing High-Performance Sensor Packages to Ensure Optimized Performance

In an era where technology and connectivity reign supreme, electronic, and mechanical…

Vinod Khera
• 4 min read
featured , IC Packaging , Allegro X Design Platform , EDA , MCAD-ECAD

Machine Learning Is Revolutionizing IBIS-AMI Optimization in High-Speed Design

The complexity of IBIS-AMI models used in simulating serial links has increased to…

MSATeam
• 1 min read
featured
System, PCB, & Package Design 

Latest blogs

Tech Blog Series: Sensitivity Analysis+Optimization — Now That's Formidable!

Anyone who designs complex circuits and claims they don’t use the Optimizer on their…

• less than a min read
RF , OrCAD Capture , PSPICE , PCB design

Tech Blog Series: Know How Your Circuit Works! — Understand It Better and Build Powerful…

Using Sensitivity Analysis of PSpice I was thinking of writing a series of blogs…

• less than a min read
RF , OrCAD Capture , PSPICE , PCB design

Some Don't Like It Hot: Thermal Model Exchange

Engineers today are faced with complex as well rapid design changes that require…

• 2 min read
CFD , neutral file format , electrical-thermal co-simulation , Sigrity , thermal , PowerDC

Thermal Analysis of Package/PCB Systems: Challenges and Solutions

More and more package/PCB system designs are requiring thermal analysis. Power dissipation…

• 3 min read
PCB , PI , Power Integrity , Voltus , electrical-thermal co-simulation , thermal , PowerDC

SI Methodology for Multi-Gigabit Serial Link Interfaces (7 of 8)

Backchannel Training Another capability related to equalization adaptation is backchannel…

• 2 min read
Serial link analysis , IBIS-AMI , PCIe , Signal Integrity , Backchannel , Sigrity

SI Methodology for Multi-Gigabit Serial Link Interfaces (6 of 8)

Simulating with IBIS-AMI Models By this point in the process, the SerDes component…

• 3 min read
Serial link analysis , SI , Multi-Gigabit , IBIS-AMI , PCIe , Signal Integrity , SerDes , Sigrity

Designing Data Bus with DDR5 Technology Today? Yes, It Is Possible!

Many system designers have been working with DDR4 RAM components in the past couple…

• 4 min read
ddr5 , AMI , Memory interface , IBIS , IBIS-AMI , DDR , Sigrity

Improve High-Speed Serial Link Design with IBIS-AMI Backchannel Simulation

As signal integrity engineers, we know adaptive equalization is used in today’s multi…

• 3 min read
Serial link analysis , Backchannel Simulation , IBIS-AMI , SerDes , Sigrity , SystemSI

Dude, Where Are Your Files?

Let me tell you a funny story. We’ve been working with an outside research agency…

• 2 min read
Engineering Data Management , data management , Work in Process Data , Work in Progress Data , ECAD data , EDM , PCB design

SI Methodology for Multi-Gigabit Serial Link Interfaces (5 of 8)

Efficient Interconnect Extraction Once physical layout is complete, (or at least…

• 3 min read
Serial link analysis , SI , Multi-Gigabit , Interconnect Extraction , IBIS-AMI , Signal Integrity , SerDes , Sigrity

SI Methodology for Multi-Gigabit Serial Link Interfaces (4 of 8)

Enabling Constraint-Driven Design With the pre-layout testbench built, populated…

• 5 min read
Serial link analysis , SI , Constraint Driven Design , Multi-Gigabit , PCIe , Signal Integrity , Sigrity

SI Methodology for Multi-Gigabit Serial Link Interfaces (3 of 8)

IBIS-AMI Modeling With initial PCB trace and via models in place for our hypothetical…

• 2 min read
Serial link analysis , SI , Multi-Gigabit , IBIS-AMI , PCIe , Signal Integrity , SerDes , Sigrity

A Peek into the Future of Signal Integrity with Artificial Neural Networks

Imagine how great life could be if computers or robots can do all our tedious work…

• 6 min read
PCB , EPEPS , DDR4 , deep learning , adaptive equalizers , ANN , Artificial Neural Networks , neurons , activation function , training , coefficients , machine learning , Signal Integrity , DDR , Sigrity , backchannel propagation , SystemSI

How Can I Assess Process Variation in My IC Package Design?

In a previous blog we talked about the IC Packaging Design Variant tool. As you recall…

• 2 min read
SiP , design variants , IC package design , APD , manufacturing , 17.2

How to Be Sure Your PCB Design Is Protected from ESD Events

One way to determine if your design can withstand an electro-static discharge (ESD…

• 4 min read
Time domain , Speed2000 , FDTD , Sigrity , ESD

SI Methodology for Multi-Gigabit Serial Link Interfaces (2 of 8)

Let’s assume that we are working on a PCI Express Gen 4 serial link, running at 16Gbps…

• 3 min read
Serial link analysis , Signal Integrity , Sigrity

Signal Integrity Methodology for Multi-Gigabit Serial Link Interfaces (1 of 8)

As data rates for serial link interfaces such as PCI Express® (PCIe®) Gen 4 move…

• 6 min read
Serial link analysis , SI , Multi-Gigabit , IBIS-AMI , PCIe , Signal Integrity , SerDes , Sigrity

Customer Support Recommends –Team Design in DE-HDL 17.2

Accelerating product time to market, achieving significantly higher productivity…

• 2 min read
PCB , Rapid Adoption Kit , RAK , Support , Team design

CDNLive China: Interviewing with Allegro R&D VP Saugat Sen

Recently, CDNLive China was held in Shanghai. What are the highlights of PCB Track…

• 2 min read
CDNLive , cdnlive china , PCB design , Allegro

Follow Video-Embedded Troubleshooting Articles for Easier Debugging and Empowered…

Finding a way out of situations is routine in today’s ever changing world—more so…

• 2 min read
PCB , AMS simulator , OrCAD Capture , Allegro

Back in the Black with a Team-Based AC/DC Power Integrity Design and Analysis Me…

We hear from a lot of customers. Whether it’s asking for help using our IR drop analysis…

• 2 min read
PDN , Power Integrity , PowerTree , Sigrity , Power Deliver Network , Allegro

Customer Support Recommends – Rigid-Flex in Allegro PCB Editor 17.2

Cadence Online Support has this Rapid Adoption Kit (RAK) on Rigid-Flex in Allegro…

• 3 min read
PCB , Flex , PCB Editor , PCB design

Empowering Learning: New Learning – Cadence Allegro and OrCAD Release17.2-2016

Interested in an easy-to-use, collaborative, and robust design-environment that reduces…

• 1 min read
Allegro Design Entry , Allegro 17.2 , AMS simulator , OrCAD Capture , Capture CIS , Allegro PCB Editor , Why Move Up to 17.2 , Allegro

Are You Maximizing Your Product Design? See How a Custom ASIC Can Help

When you push more of your board into high-performance design fabric like an SoC…

• 1 min read
ASIC , cadence hosted design solutions , designstart , ARM

Epic Western Movies and PCB Design. Seriously.

I love that recently Westerns movies are making a comeback. Something about the romanticism…

• 2 min read
PCB , PCB Layout and routing , Routing , PCB Co-Design , Symphony , Team design , PCB Editor , PCB design , Allegro PCB Editor , Allegro

How Your PCB Design Team Can Become Your Dream Team for Power Integrity

Cadence’s Sigrity team speaks to a lot of power integrity tool users. Experts in…

• 3 min read
PCB , PI , PDN , Power Integrity , Layout , Sigrity , simulation , Schematic

PSpice – A SPICE Tool Way Beyond Functional Simulation Being Showcased at CDNLive…

Every year Cadence Design Systems an industry leader in the Electronic Design Automation…

• less than a min read
Cadence Design Systems , AMS simulator , PSPICE , Grzenia , Allegro

Why is Power Integrity Hot (or is it Cool)?

When designing next-generation products, the common theme is "faster, smaller, cheaper…

• 2 min read
Power Integrity , electrical-thermal co-simulation , Sigrity , thermal
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