IC Packaging and SiP Blogs

When you are creating a BGA package component, you are, almost certainly, going to be implementing one that adheres to JEDEC standards. This means selecting from a set of available package size and pin pitch combinations, using a specific, grid-based pin numbering scheme (and skipping letters like ‘I’ and ‘O’ that are apt to be confused with numbers), and other factors.

These conventions, put together by the JEDEC committee, are there to help you in making more consistent devices that are easier to use and integrate onto other substrates. The value of following them is significant.

That’s why, in the Allegro Package Designer, instead of shipping a large set of pre-built library symbols for all the various JEDEC parameters, the BGA Generator (under the Add menu) allows you to configure and generate just the specific device that you need with the press of a few buttons.

Make no mistake – Allegro can create the most custom ball pattern you could want! – but consider adhering to the industry standards in order to make your life easier. Read along as we cover how the BGA Generator makes this simple, while other tools inside of the application allow you to fine-tune to your exacting specifications.

The BGA Generator

There are three primary sources for BGA symbols in Allegro today. You may use an existing definition from the library (perhaps exported from a previous design that you want to align with to keep PCB escape routing consistent for your next design revision), source the information from a BGA text file, or define a new part with the BGA Generator.

BGA text files are very useful since they allow you to incorporate the pin use and net assignments, custom padstack information, and properties at the pin and net level all into a single, self-contained file. When you are co-designing your package with the PCB it will be mounted on, you might get a starting ball pattern with net assignments in this format that you may use to drive die bump patterns on co-design components inside the package.

But, in situations where you are starting from scratch, with naught but the die component(s) that need to be packaged, the BGA generator is where you want to start that investigation. To be effective, all you need to know is the number of signal pins you’ll need, the power/ground ratios, and the size of the die footprint. After all, you can’t package a die inside of a package if the die is BIGGER than the package!

The BGA generator is a wizard-style interface, meaning it will guide you through the steps to define the symbol while managing the interactions between the different values. When creating a JEDEC part, the prime page is the second, “Pin Arrangement,” shown below:

If in custom mode, you can define any size and pattern that you like. In JEDEC, on the other hand, you can pick from all the size combinations currently available. Each size has an associated set of pin pitches and rows/columns that are allowed.

While you retain the freedom to specify the full matrix or perimeter style and size of the perimeter and core, you will be assured that the part you get at the end is well-aligned with one of the many JEDEC package sizes.

Therefore, the biggest concerns you should be satisfying here go back to the die data that you need. How much area do you need to hold all your die footprints on the package surface? And how many total signal pins do you have? If the package size you’ve selected doesn’t allow for enough signals, then you will need to shift to an alternative size. Don’t forget that the pin count needs to include power and ground supply as well; the next page of the wizard will let you tailor the power:ground:signal ratio and determine whether you truly have enough signal pins.

After you’ve decided on the size of the BGA, the pin numbering pattern is also driven by JEDEC conventions. You will find this on the second last page of the wizard, below. You can set the pattern – typically with numbers along one axis and letters on the other, giving you pin numbers like A1, A2, as at the top of the form.  

You’ll want to ensure that the JEDEC standard option is on. This will suppress the letters mentioned earlier from use. Nobody wants to confuse “IO” with “10” at a quick glance.

Pin number labels are always generated on top of each pin, but you can also elect to have them listed outside along the sides of the component. If you consider the ball pattern as a grid, these let you quickly find any pin – C7 means row 3, column 7. It is well defined with no ambiguity. A great tool for communicating with the PCB design team!

The Symbol Edit Application Mode

If you need to tweak the BGA ball pattern that you get from the generator, the application mode is the way to go. While you should never change the pin pitch or symbol’s size itself, you may need to update the symbol to add reference shapes like keepout areas or modify the border text visibility.

One common action is to rename the pins in the core area. Since these are a separate “area,” designers may choose to use a unique prefix in this area (CORE_A1, CORE_A2), or maybe even swap the order of the letters and numbers. In that way, the peripheral pattern might have A1 in the top-left corner, while the core might use 1A in its top right. This allows you further quick identification based on the format of the number where you are looking to find it.

Don’t forget to define the size and shape of the solder balls themselves! Right mouse on the BGA part and choose Bump/Ball Attributes. Like the bump data for a flip-chip die, configuring these will let them be displayed in the 3D Canvas and other areas.

When finished tweaking the part, you’ll end up with a BGA object like this one:

At this point, you’re now ready to map the signals from your die components to the BGA balls to complete your substrate netlist (assuming you didn’t get this from your front-end schematic). Do this with the Logic - Auto Assign Net command for a quick and easy baseline.

End Results

With the package defined, you might notice a few other useful attributes have been added to the design at the same time. An initial design outline is added (but not a route keep-in shape; if you have a plating bar for this design, that will extend beyond the design outline).

A JEDEC compliant BGA will make many future steps in the system design flow much simpler. If you’re creating a full-custom ball grid today, it may be worth the time to verify whether a standard package would work. The long term benefits may well outweigh the short term costs!