Stats

  • Locked Locked
  • Replies 12
  • Subscribers 128
  • Views 6060
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

IC6 constraining/placing matched transistors

stuso

Hi there,

Is anyone aware if its possible to constrain the placement of transistors for matching such that you can dictate the order of devices and the layer used to space them.

For example i have a schematic with 3 mos device, all of same w/L and 1 finger and 2 multiples.

Schematic:

nm1 m(multiple)=2, nm2 m=2 , dummy1 m=2

I want layout to place/constrain these to align and equally space as:

dummy1.1    nm2.1     nm1.1     nm1.2    nm2.2     dummy1.2

so for example there is polygon in each pcell called OD which i would like NOT to overlap AND be spaced by 1um, so the layout looks like 6 transistors in a line with the OD layers spaced by 1um.

Its basiaclly a simple current mirror with nm1 the bias device in the centre, nm2 split either side & dummy on either end. For matching all 6 units are equally spaced.

Thanks

Stu

 

Parents

  •  Hi Sravasti,

    many thanks for your help, i have it working now. Here are my own notes on how to do for anyone else out there (sorry for the format, its for an internal wiki page):

    MODGEN's Module Generator

    This is a very useful function which allows the designer to dictate the layout of pcells. For example you may have a diff pair(M11&M12) and some dummy's(M19) and you want to space & place them as:

    M19 M11 M12 M12 M11 M19

    M19 M11 M12 M12 M11 M19

    Note each device has a multiple=4

     

    Here is a how to do this

     

    • Open up your schemtic in schematic XL

     

    • From schematic turn on the constraints manager

    Windows -> Assistant -> Constraint manager

     

    • Select the transistors that you wish to place i.e M11,12 & 19

     

    • Within the constraint manager window (lets call that CMW) from the 2nd drop down menu select:

    Placement -> Modgen

    The devices should light up & your new modgen should appear in the CMW.

     

    • Now turn on the module generator

    From the 3rd drop down menu in the CMW select module generator. This should bring up the layout in a new "module generator" window (lets call this MGW).

     

    • Pattern setting

    From within the MGW click the pattern icon at the top, looks like 9 little squares

    1) Click custom

    2) Notice the name mapping

    A : M19 (4)

    B : M11 (4)

    C : M12 (4)

    3) Now set the pattern based on the mapped name:

    A B C C B A

    A B C C B A

    4) Set the orientation of each transistor:

    R0 R0 R0 R0 R0 R0

    R0 R0 R0 R0 R0 R0

    5) Click OK, you should see the devices now placed in the correct order in 2 neat rows.

     

    • Set the transistor spacing

    1) Click the member aligment/spacing (looks like 2 wee transistors)

    2) Click on horizontal & vertical and set both drop-downs to custom

    Now manually enter the spacing required, for example you may wish to space by the minimum OD spacing.

    You CAN use -ve numbers here to overlap devices, infact you will have to.

    4) Your layout should now space neatly as you specified

     

    • Exit the MGW, click the exit icon at the top left

     

    • Click the save botton on the CMW

    This should now be ready for layout. If you want to see it:

     

    • Launch -> Layout XL

     

     

     

Reply

  •  Hi Sravasti,

    many thanks for your help, i have it working now. Here are my own notes on how to do for anyone else out there (sorry for the format, its for an internal wiki page):

    MODGEN's Module Generator

    This is a very useful function which allows the designer to dictate the layout of pcells. For example you may have a diff pair(M11&M12) and some dummy's(M19) and you want to space & place them as:

    M19 M11 M12 M12 M11 M19

    M19 M11 M12 M12 M11 M19

    Note each device has a multiple=4

     

    Here is a how to do this

     

    • Open up your schemtic in schematic XL

     

    • From schematic turn on the constraints manager

    Windows -> Assistant -> Constraint manager

     

    • Select the transistors that you wish to place i.e M11,12 & 19

     

    • Within the constraint manager window (lets call that CMW) from the 2nd drop down menu select:

    Placement -> Modgen

    The devices should light up & your new modgen should appear in the CMW.

     

    • Now turn on the module generator

    From the 3rd drop down menu in the CMW select module generator. This should bring up the layout in a new "module generator" window (lets call this MGW).

     

    • Pattern setting

    From within the MGW click the pattern icon at the top, looks like 9 little squares

    1) Click custom

    2) Notice the name mapping

    A : M19 (4)

    B : M11 (4)

    C : M12 (4)

    3) Now set the pattern based on the mapped name:

    A B C C B A

    A B C C B A

    4) Set the orientation of each transistor:

    R0 R0 R0 R0 R0 R0

    R0 R0 R0 R0 R0 R0

    5) Click OK, you should see the devices now placed in the correct order in 2 neat rows.

     

    • Set the transistor spacing

    1) Click the member aligment/spacing (looks like 2 wee transistors)

    2) Click on horizontal & vertical and set both drop-downs to custom

    Now manually enter the spacing required, for example you may wish to space by the minimum OD spacing.

    You CAN use -ve numbers here to overlap devices, infact you will have to.

    4) Your layout should now space neatly as you specified

     

    • Exit the MGW, click the exit icon at the top left

     

    • Click the save botton on the CMW

    This should now be ready for layout. If you want to see it:

     

    • Launch -> Layout XL

     

     

     

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.