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  3. Assura QRC extraction problem

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Assura QRC extraction problem

Potamus
Potamus over 16 years ago


I am currently using Assura320 with EXT71 with IBM 90nm PDK. The extracted transistor has correct length but width is always the
default pcell parameter of the PDK. Is this a design kit problem? or am i doing something wrong? All passive elements are extracted correctly.

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  • miguelUA
    miguelUA over 16 years ago

    I am experiencing exactly the same problem. Apparently it has nothing to do with the PDK since I am having the same extraction problem for several design kits (AMS350, UMC 180nm and UMC130nm). The same problem does not appear when runing the extraction with DIVA, but I have some limitations for DIVA usage under UMC design environments. I have also verified that this problem does not appeared in previous versions of Assura (at least 3 generations ago, the first Assura Linux distribution), where the extraction process included the steps of av_extracted and av_analog_extracted generation. Can someone give a hint on how to solve this problem? 

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  • Toyrunner
    Toyrunner over 16 years ago

     Any news on this issue. I have the same problem with and IBM kit from MOIS. Basically the varactors are defaulting to their PCELL length once they have been extracted (IC 5.1.41_USR5 / Assura 3.1.7 / QRC(EXT) 7.1.2). 

     

    Also the tech file will not load in the QRC form. This is not the case for DRC and LVS which are able to get the techfile from my assura_tech.lib file.

     

    Any help will be greatly appreciated. 

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  • tkhan
    tkhan over 16 years ago

    I'm having the same problem as Toyrunner and I made a post about it a few days ago. I can't load the QRC technology information even though DRC and LVS will read from assura_tech.lib. According to qrcxUser.pdf it only needs assura_tech.lib for the technology info. I'm using CMOS8RF V1.5.0.1DM from MOSIS. Thanks.

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