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A quetion of post layout simulation

Tinaliao

After schematic simulation and layout extraction, I got an extracted layout, and then I did the LVS. Finally I want to do the post layout simulation using my extracted layout. 

 However, I have two problems.

 1. I found that if I don't add the model library, e.g., the ami06P and ami06N, the simulation can't succeed. But  I think using ami06P and ami06N, it is using the existing models rather than the layout I draw. (I already changed the environment to be "spectre comos_sch cmos.sch extracted schematic veriloga ahdl").

2.  In addition, the simulation using the extracted layout just outputs a voltage of 0 V and the input and output current of the layout are both 0 A. I don't know the reason.

 Thank you very much.

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  • Tinaliao said:
    What is the view name? I named my circuit as extracted1.

     

    If it is the cellview name, then you should be putting extracted1 into the switch view list. If it is the cell name, you need to find out what cellview is created by your extraction tool and add that to switch view list.

    What tool are you using to extract? Diva? RCX? QRC? Diva will call the extracted cellview "extracted", QRC (and I believe RCX) will call it "av_extracted". I know that If you used QRC and told it to extract parasitics, they should appear in the netlist as pcapacitor, presistor, pinductor, pmind. 

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  • Tinaliao said:
    What is the view name? I named my circuit as extracted1.

     

    If it is the cellview name, then you should be putting extracted1 into the switch view list. If it is the cell name, you need to find out what cellview is created by your extraction tool and add that to switch view list.

    What tool are you using to extract? Diva? RCX? QRC? Diva will call the extracted cellview "extracted", QRC (and I believe RCX) will call it "av_extracted". I know that If you used QRC and told it to extract parasitics, they should appear in the netlist as pcapacitor, presistor, pinductor, pmind. 

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