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Sigma Delta 1st Order parameter definition

caveman54

Hello-

I am trying to use the vhdl sigma-delta model in the ahdl lib and have some questions relating to the cdf parameters.

What is the threshold voltage (vth)  if my input range is -1 to 1 volt?

What is the vout-high, is that the data output high or the maximom input voltage to get a data output high?

Thank You

caveman54

 

Parents

  • First of all, the model (sigmadelta_1storder ) is in Verilog-A, not VHDL.

    The vth is the threshold for the quantizer. So if you have a signal swing of -1 to 1 V, it would most likely be 0 (which is the default).

    The vout_high parameter is the voltage level for the high level of the digital output signal from the sigma-delta. So a "1" will be at a voltage of vout_high, and a "0" will be at -vout_high volts (you may want to copy and change the model to suit your needs). The model itself is pretty straightforward to understand, even if you're not familiar with VerilogA.

    Regards,

    Andrew.

Reply

  • First of all, the model (sigmadelta_1storder ) is in Verilog-A, not VHDL.

    The vth is the threshold for the quantizer. So if you have a signal swing of -1 to 1 V, it would most likely be 0 (which is the default).

    The vout_high parameter is the voltage level for the high level of the digital output signal from the sigma-delta. So a "1" will be at a voltage of vout_high, and a "0" will be at -vout_high volts (you may want to copy and change the model to suit your needs). The model itself is pretty straightforward to understand, even if you're not familiar with VerilogA.

    Regards,

    Andrew.

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