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Problem using QRC with Calibre input

mbhealy

 Hi All,

 I'm trying to use QRC to provide me with SPICE netlist output using Calibre LVS inputs.

 I have tried to follow the QRC with Calibre Input section of the QRC user guide but I've run into a problem.

 I'm getting the following error:

 INFO (LBRCXM-630): Starting extraction...

ERROR (AGDPRP-31023): syntax error in file ./query_output/Design.lph, line 2

;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
 agdsPrep -V -rundir ./query_output -outdir ./qrc_run -e ./techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell ./qrc_run/Design.hcl -d Design.devtab -prefix ./qrc_run/prefixfile -l ./techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

 When I try to run the forked command 'agdsPrep -V ...' as a separate run I get  a licensing error:

 ERROR (LBLIC-14003): Neither one of the following required licenses are available:
  (Virtuoso_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  (Encounter_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  Virtuoso_QRC_Extraction_GXL or
  Encounter_QRC_Extraction_GXL.

 

The Design.lph file was created from the Calibre query_output command and doesn't look malformed in any way, so I don't know if that error is spurious and really it's a licensing problem. Unfortunately I can't figure out which product number  QRC_Advanced_Modeling is from our product guide. We have  Virtuoso_QRC_Extraction_XL (QRCX300) and   "Virtuoso Advanced Analysis GXL option" (QRCX310) installed. Does anyone know the product number for QRC_Advanced_Modeling? As in QRCX310 or something? This is for university use if that matters.

 

Thanks!

Michael

Parents

  •  Hi Quek,

     I used Techgen -split and it produced the following files:

    -rw-r--r--  1 mbhealy gtcad  2013640 Mar  9 11:02 RCGEN
    -rw-r--r--  1 mbhealy gtcad  3074166 Mar  9 11:02 cap_coeff.dat
    -rw-r--r--  1 mbhealy gtcad 14118627 Mar  9 11:02 caps2d
    -rw-r--r--  1 mbhealy gtcad  1873060 Mar  9 11:02 capsw3d
    -rw-r--r--  1 mbhealy gtcad      659 Mar  9 11:02 p2lvsfile
    -rw-r--r--  1 mbhealy gtcad   167036 Mar  9 11:02 paxfile_coeff
    -rw-r--r--  1 mbhealy gtcad     4008 Mar  9 11:02 procfile
    -rw-r--r--  1 mbhealy gtcad 12834110 Mar  9 11:02 rcxfs.dat

     So it appears that it is a unified techfile. However, I found in the QRC Userguide a sentence that said a techfile produced with Techgen -trans is not unified. When I look at my Techgen log the command that was used for the simulation portion was Techgen -trans. After the Techgen -trans simulation run I did run Techgen -compile, which I believe will make a unified techfile. I'm slightly confused about whether I have a unified techfile or not. If so, why is QRC giving me that error? Should I run a different Techgen -simulation command to generate the cell information?

     

    For the syntax error on Design.lph, I'm getting exactly the same error as before:

    INFO (LBRCXM-630): Starting extraction...

    ERROR (AGDPRP-31023): syntax error in file /home/gtcad/mbhealy/ifc/extract/qrc/query_output/Design.lph, line 2

    ;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
     agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

    Forking: agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile
    ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

    INFO (LBRCXM-709): *****  QRC terminated abnormally  *****

     

    And the entire Design.lph file is this:

    # SVDB: Layout Placement Hierarchy (lph) (File format 1)
    # SVDB: Layout Primary core1
    # SVDB: Rules -0 /home/gtcad/mbhealy/nsa/new_virt/lvs_run/_master_top_lvs.cal_ Mon Mar  8 19:30:35 2010
    # SVDB: GDSII -0 /home/gtcad/mbhealy/ifc/extract/qrc/core1.calibre.db
    # SVDB: SNL -0 _source.net_
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB: End of header.

    Do the files mentioned in the Rules and GDSII lines need to be in those locations? The core1.calibre.db file is in a different location, however, changing the path to that location doesn't change the error message.

     Thanks for you help.

    Regards,
    Michael

Reply

  •  Hi Quek,

     I used Techgen -split and it produced the following files:

    -rw-r--r--  1 mbhealy gtcad  2013640 Mar  9 11:02 RCGEN
    -rw-r--r--  1 mbhealy gtcad  3074166 Mar  9 11:02 cap_coeff.dat
    -rw-r--r--  1 mbhealy gtcad 14118627 Mar  9 11:02 caps2d
    -rw-r--r--  1 mbhealy gtcad  1873060 Mar  9 11:02 capsw3d
    -rw-r--r--  1 mbhealy gtcad      659 Mar  9 11:02 p2lvsfile
    -rw-r--r--  1 mbhealy gtcad   167036 Mar  9 11:02 paxfile_coeff
    -rw-r--r--  1 mbhealy gtcad     4008 Mar  9 11:02 procfile
    -rw-r--r--  1 mbhealy gtcad 12834110 Mar  9 11:02 rcxfs.dat

     So it appears that it is a unified techfile. However, I found in the QRC Userguide a sentence that said a techfile produced with Techgen -trans is not unified. When I look at my Techgen log the command that was used for the simulation portion was Techgen -trans. After the Techgen -trans simulation run I did run Techgen -compile, which I believe will make a unified techfile. I'm slightly confused about whether I have a unified techfile or not. If so, why is QRC giving me that error? Should I run a different Techgen -simulation command to generate the cell information?

     

    For the syntax error on Design.lph, I'm getting exactly the same error as before:

    INFO (LBRCXM-630): Starting extraction...

    ERROR (AGDPRP-31023): syntax error in file /home/gtcad/mbhealy/ifc/extract/qrc/query_output/Design.lph, line 2

    ;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
     agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

    Forking: agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile
    ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

    INFO (LBRCXM-709): *****  QRC terminated abnormally  *****

     

    And the entire Design.lph file is this:

    # SVDB: Layout Placement Hierarchy (lph) (File format 1)
    # SVDB: Layout Primary core1
    # SVDB: Rules -0 /home/gtcad/mbhealy/nsa/new_virt/lvs_run/_master_top_lvs.cal_ Mon Mar  8 19:30:35 2010
    # SVDB: GDSII -0 /home/gtcad/mbhealy/ifc/extract/qrc/core1.calibre.db
    # SVDB: SNL -0 _source.net_
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB: End of header.

    Do the files mentioned in the Rules and GDSII lines need to be in those locations? The core1.calibre.db file is in a different location, however, changing the path to that location doesn't change the error message.

     Thanks for you help.

    Regards,
    Michael

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