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Problem using QRC with Calibre input

mbhealy

 Hi All,

 I'm trying to use QRC to provide me with SPICE netlist output using Calibre LVS inputs.

 I have tried to follow the QRC with Calibre Input section of the QRC user guide but I've run into a problem.

 I'm getting the following error:

 INFO (LBRCXM-630): Starting extraction...

ERROR (AGDPRP-31023): syntax error in file ./query_output/Design.lph, line 2

;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
 agdsPrep -V -rundir ./query_output -outdir ./qrc_run -e ./techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell ./qrc_run/Design.hcl -d Design.devtab -prefix ./qrc_run/prefixfile -l ./techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

 When I try to run the forked command 'agdsPrep -V ...' as a separate run I get  a licensing error:

 ERROR (LBLIC-14003): Neither one of the following required licenses are available:
  (Virtuoso_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  (Encounter_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  Virtuoso_QRC_Extraction_GXL or
  Encounter_QRC_Extraction_GXL.

 

The Design.lph file was created from the Calibre query_output command and doesn't look malformed in any way, so I don't know if that error is spurious and really it's a licensing problem. Unfortunately I can't figure out which product number  QRC_Advanced_Modeling is from our product guide. We have  Virtuoso_QRC_Extraction_XL (QRCX300) and   "Virtuoso Advanced Analysis GXL option" (QRCX310) installed. Does anyone know the product number for QRC_Advanced_Modeling? As in QRCX310 or something? This is for university use if that matters.

 

Thanks!

Michael


  • Hi Michael

    Thank you very much for the detail problem description. : )  Would you please post lines 1-5 from the file design.lph? Sometimes it might be that QRC mistook some legal characters (e.g. @) as illegal and wrongly issues a syntax error. It might also be a real error. We need to look at those lines in order to confirm this.

    It would also be good if you can retry the problem using latest version of QRC (911HF3). Product number for QRC_Advanced_Modeling is QRCX320. You can refer to table 1-1 in QRC user guide ($QRC_HOME/doc/qrcxUser/qrcxUser.pdf).

    Best regards
    Quek

  •  Hi Quek,

     Here is the header section of Design.lph:

    # SVDB: Layout Placement Hierarchy (lph) (File format 1)
    # SVDB: Layout Primary core1
    # SVDB: Rules -0 /home/gtcad/mbhealy/nsa/new_virt/lvs_run/_master_top_lvs.cal_ Sat Feb 27 14:29:29 2010
    # SVDB: GDSII -0 /home/gtcad/mbhealy/ifc/extract/qrc/core1.calibre.db
    # SVDB: SNL -0 _source.net_
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB: End of header.
    % AND2X1  5
    M0  MN  4
    ...

     I'm not sure if I'm using 911HF3, but here is the output of qrc -v

    Name           : qrc - Cadence Extraction QRC - (64-bit)
    Description    : Parasitic Extractor
    Version        : 9.1.1-p010
    Build Ref. No. : 559611
    IR Build No.   : 12342
    Build Date     : Thu Feb 25 17:45:23 PST 2010

     A fairly recent build I think.

     Thanks for the pointer to Table 1-1. That helps. Unfortunately it looks like QRCX320 has not been made available to my university. I hope that that isn't the problem.

     Regards,

    Michael

  • Hi Michael

    Yes, you are using EXT911HF3. Line 2 does indeed looks ok. Let's try to get rid of lph file (layout placement hierarchy) and see what happens. Would you please re-run Calibre lvs without using "-hier" option and then re-do query? We will generate a flat query database.

    By the way, may I know the current Calibre lvs cmd which you have used?
    linux>calibre -lvs ... ?

    Best regards
    Quek

  •  Quek,

     I created a new calibre run without hierarchy. I generally use the Calibre GUI integrated into Virtuoso. It said that the command used for running calibre is simply: 'calibre -lvs -nowait _master_top_lvs.cal_'.

     Then I reran the query command: 'calibre -query_input query_cmd -query ../lvs_run/svdb core1' and it generated a new query_output. I am using the query_cmd file that was included in the QRC distribution. This query_output directory still has the Design.lph and Design.sph files. The only thing in them now is the header, the body of the files are empty. I tried running QRC with these files in place and it gave me the same syntax error in Design.lph. Then I moved the files and reran and I get a syntax error in Design.nxf.

     When I move Design.nxf and rerun QRC I get the following error:

     INFO (CAPGEN-41199):


    Techgen -trans results will be written to directory: /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run

    ERROR (CAPGEN-41223): File '/home/gtcad/mbhealy/ifc/extract/qrc/techdir/qrcTechFile' is not an unified techfile.

    INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
     /tools/linsoft2/cadence/ext91/tools/extraction/bin/64bit//capgen -techdir /home/gtcad/mbhealy/ifc/extract/qrc/techdir -lvs /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.xcn -p2lvs /home/gtcad/mbhealy/ifc/extract/qrc/techdir/qrcTechFile -sw3d /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run

    Forking: agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile
    Forking:  /tools/linsoft2/cadence/ext91/tools/extraction/bin/64bit//capgen -techdir /home/gtcad/mbhealy/ifc/extract/qrc/techdir -lvs /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.xcn -p2lvs /home/gtcad/mbhealy/ifc/extract/qrc/techdir/qrcTechFile -sw3d /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run
    ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

    INFO (LBRCXM-709): *****  QRC terminated abnormally  *****

     

    Any idea what a unified techfile is and why my techfile is not unified?

    Michael

  • Hi Michael

    A unified "qrcTechFile" consists of 2 portions, namely the cell and transistor portions. Your qrcTechFile can be split to check if it contains both portions:

    linux>Techgen -split /home/gtcad/mbhealy/ifc/extract/qrc/techdir/ifc/extract/qrc/techdir/qrcTechFile

    Cell portion is just a single file named "RCGEN". Transistor portion consists of various files such as caps2d, capsSw3d, cap_coeff.dat,etc. For Virtuoso designs, we only require the transistor portion.

    You mentioned that there is also syntax error for lph file from the new query database. May I have the new error message? Are there any line numbers?

    Thanks
    Quek

  •  Hi Quek,

     I used Techgen -split and it produced the following files:

    -rw-r--r--  1 mbhealy gtcad  2013640 Mar  9 11:02 RCGEN
    -rw-r--r--  1 mbhealy gtcad  3074166 Mar  9 11:02 cap_coeff.dat
    -rw-r--r--  1 mbhealy gtcad 14118627 Mar  9 11:02 caps2d
    -rw-r--r--  1 mbhealy gtcad  1873060 Mar  9 11:02 capsw3d
    -rw-r--r--  1 mbhealy gtcad      659 Mar  9 11:02 p2lvsfile
    -rw-r--r--  1 mbhealy gtcad   167036 Mar  9 11:02 paxfile_coeff
    -rw-r--r--  1 mbhealy gtcad     4008 Mar  9 11:02 procfile
    -rw-r--r--  1 mbhealy gtcad 12834110 Mar  9 11:02 rcxfs.dat

     So it appears that it is a unified techfile. However, I found in the QRC Userguide a sentence that said a techfile produced with Techgen -trans is not unified. When I look at my Techgen log the command that was used for the simulation portion was Techgen -trans. After the Techgen -trans simulation run I did run Techgen -compile, which I believe will make a unified techfile. I'm slightly confused about whether I have a unified techfile or not. If so, why is QRC giving me that error? Should I run a different Techgen -simulation command to generate the cell information?

     

    For the syntax error on Design.lph, I'm getting exactly the same error as before:

    INFO (LBRCXM-630): Starting extraction...

    ERROR (AGDPRP-31023): syntax error in file /home/gtcad/mbhealy/ifc/extract/qrc/query_output/Design.lph, line 2

    ;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
     agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

    Forking: agdsPrep -V -rundir /home/gtcad/mbhealy/ifc/extract/qrc/query_output -outdir /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run -e /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/Design.hcl -d Design.devtab -prefix /home/gtcad/mbhealy/ifc/extract/qrc/qrc_run/prefixfile -l /home/gtcad/mbhealy/ifc/extract/qrc/techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile
    ERROR (LBRCXM-633): Bad return status from RCX script generator. Status 256

    INFO (LBRCXM-709): *****  QRC terminated abnormally  *****

     

    And the entire Design.lph file is this:

    # SVDB: Layout Placement Hierarchy (lph) (File format 1)
    # SVDB: Layout Primary core1
    # SVDB: Rules -0 /home/gtcad/mbhealy/nsa/new_virt/lvs_run/_master_top_lvs.cal_ Mon Mar  8 19:30:35 2010
    # SVDB: GDSII -0 /home/gtcad/mbhealy/ifc/extract/qrc/core1.calibre.db
    # SVDB: SNL -0 _source.net_
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB:
    # SVDB: End of header.

    Do the files mentioned in the Rules and GDSII lines need to be in those locations? The core1.calibre.db file is in a different location, however, changing the path to that location doesn't change the error message.

     Thanks for you help.

    Regards,
    Michael

  • Hi Michael

    The process of creating a unified techfile is as follows:
    a. First use "Techgen -si ..." cmd to do simulation. Depending on the number of machines used (typ is about 30), this can take from a few hours to 2-3 dats. This will create a file named "qrcTechFile" in the sim directory. This file contains RCGEN and the files caps2d, capsw3d, etc. This file can now be used for cell level extraction but is still not ready for transistor level extraction because we need to generate RCXspiceINIT runscript.

    b. Next do compilation. This step generates a runscript named RCXspiceINIT. After compilation, we have a unified techfile (qrcTechFile+RCXspiceINIT) which can be used for both cell and transistor level simulation.

    You do have a unified techfile. I can see both the cell and transistor level files. Actually I don't think that qrcTechFile is the problem here. Maybe it is better to resolve the lph issue first.

    The situation actually seems to be quite strange because your new lph file now contains only comments (indicating that it is a flat lvs run) but qrc is still giving error for line 2 which no longer exists.

    Hope that you don't mind, is it ok if you remove everything in /home/gtcad/mbhealy/ifc/extract/qrc/query_output and redo query for the flat lvs. Although the possibility is quite small, I am suspecting that this might be due to some files being mixed up between the runs. If it still does not work, I think you need to contact your local Cadence support and submit a testcase for debugging.

    The files mentioned in Rules and GDSII lines need not be in those locations. The db file is not required after the query.

    Best regards
    Quek

  • Hi all,

    I have tried to run  QRC with Calibre Input section, i tried to extract 'RC' information(extract -selection all -type rc_coupled), i run into a problem.

    I'm getting the following error:

    WARNING (LBMISC-215001): file 'psd_0pmos' is a flat edge file

    ERROR (LBMISC-215002): it is a hierarchical edge file

     but when i tried to extract 'C' information only(extract -selection all -type c_only_coupled), no error occured.

     Anybody knowns why?

    Looking forward to your reply, Thanks very much!

     

  • Hi Bruce

    As this thread has already ended in March 2010, would you please create a new thread for your question? Please also kindly review the forum guidelines and amend your description accordingly (e.g. provide QRC version number, etc).

    Best regards
    Quek

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