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Problem using QRC with Calibre input

mbhealy

 Hi All,

 I'm trying to use QRC to provide me with SPICE netlist output using Calibre LVS inputs.

 I have tried to follow the QRC with Calibre Input section of the QRC user guide but I've run into a problem.

 I'm getting the following error:

 INFO (LBRCXM-630): Starting extraction...

ERROR (AGDPRP-31023): syntax error in file ./query_output/Design.lph, line 2

;|INFO (RCXSPIC-27150): The following forked command failed. Contact Cadence Customer Support for assistance.
 agdsPrep -V -rundir ./query_output -outdir ./qrc_run -e ./techdir/lvsfile:Design.alm,Design.ilf -pl Design.ports -mcell ./qrc_run/Design.hcl -d Design.devtab -prefix ./qrc_run/prefixfile -l ./techdir/lvsfile -i Design.ixf,Design.lph,Design.sph:Design.gdx -n Design.nxf,Design.stl:Design.gnx -s Design_pin_xy.spi:Design.xcn,hccidtmfile

 When I try to run the forked command 'agdsPrep -V ...' as a separate run I get  a licensing error:

 ERROR (LBLIC-14003): Neither one of the following required licenses are available:
  (Virtuoso_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  (Encounter_QRC_Extraction_XL + QRC_Advanced_Modeling) or
  Virtuoso_QRC_Extraction_GXL or
  Encounter_QRC_Extraction_GXL.

 

The Design.lph file was created from the Calibre query_output command and doesn't look malformed in any way, so I don't know if that error is spurious and really it's a licensing problem. Unfortunately I can't figure out which product number  QRC_Advanced_Modeling is from our product guide. We have  Virtuoso_QRC_Extraction_XL (QRCX300) and   "Virtuoso Advanced Analysis GXL option" (QRCX310) installed. Does anyone know the product number for QRC_Advanced_Modeling? As in QRCX310 or something? This is for university use if that matters.

 

Thanks!

Michael

Parents

  • Hi Michael

    The process of creating a unified techfile is as follows:
    a. First use "Techgen -si ..." cmd to do simulation. Depending on the number of machines used (typ is about 30), this can take from a few hours to 2-3 dats. This will create a file named "qrcTechFile" in the sim directory. This file contains RCGEN and the files caps2d, capsw3d, etc. This file can now be used for cell level extraction but is still not ready for transistor level extraction because we need to generate RCXspiceINIT runscript.

    b. Next do compilation. This step generates a runscript named RCXspiceINIT. After compilation, we have a unified techfile (qrcTechFile+RCXspiceINIT) which can be used for both cell and transistor level simulation.

    You do have a unified techfile. I can see both the cell and transistor level files. Actually I don't think that qrcTechFile is the problem here. Maybe it is better to resolve the lph issue first.

    The situation actually seems to be quite strange because your new lph file now contains only comments (indicating that it is a flat lvs run) but qrc is still giving error for line 2 which no longer exists.

    Hope that you don't mind, is it ok if you remove everything in /home/gtcad/mbhealy/ifc/extract/qrc/query_output and redo query for the flat lvs. Although the possibility is quite small, I am suspecting that this might be due to some files being mixed up between the runs. If it still does not work, I think you need to contact your local Cadence support and submit a testcase for debugging.

    The files mentioned in Rules and GDSII lines need not be in those locations. The db file is not required after the query.

    Best regards
    Quek

Reply

  • Hi Michael

    The process of creating a unified techfile is as follows:
    a. First use "Techgen -si ..." cmd to do simulation. Depending on the number of machines used (typ is about 30), this can take from a few hours to 2-3 dats. This will create a file named "qrcTechFile" in the sim directory. This file contains RCGEN and the files caps2d, capsw3d, etc. This file can now be used for cell level extraction but is still not ready for transistor level extraction because we need to generate RCXspiceINIT runscript.

    b. Next do compilation. This step generates a runscript named RCXspiceINIT. After compilation, we have a unified techfile (qrcTechFile+RCXspiceINIT) which can be used for both cell and transistor level simulation.

    You do have a unified techfile. I can see both the cell and transistor level files. Actually I don't think that qrcTechFile is the problem here. Maybe it is better to resolve the lph issue first.

    The situation actually seems to be quite strange because your new lph file now contains only comments (indicating that it is a flat lvs run) but qrc is still giving error for line 2 which no longer exists.

    Hope that you don't mind, is it ok if you remove everything in /home/gtcad/mbhealy/ifc/extract/qrc/query_output and redo query for the flat lvs. Although the possibility is quite small, I am suspecting that this might be due to some files being mixed up between the runs. If it still does not work, I think you need to contact your local Cadence support and submit a testcase for debugging.

    The files mentioned in Rules and GDSII lines need not be in those locations. The db file is not required after the query.

    Best regards
    Quek

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