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Copying netset properties to layout

Grover

I'm using a couple of cells in my circuits that have their power supply connections implemented as global nets (vdd! and gnd!). Now I want to use these within other cells that have their own supply rails (say, vdd_3 and vss_a), and connect the subcells' power supplies to the higher level cell's supply rails. I do this by adding the netset property to the appropriate instance, which connects the subcell's vdd! to the higher level cell's vdd_3.

Now this works fine in the simulator, but when I want to layout the circuit, it goes wrong, because the subcell still has its nets labelled vdd! and gnd!, and connecting them to vdd_3 and vss_a just gives me a flashing yellow cross.

I found in the manual that "the netSet properties on schematic instances, which specify the new value of a global signal, are not copied over with the instance from the schematic to the layout when you use the Gen From Source, Pick from Schematic, or Update Layout Parameters command", so this behaviour is as documented. But how do I fix it then? It's not possible to add a netset property to a layout instance, so I can't manually correct it after placement either.

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  • Grover

    Ah, now I see what you meant. The inverter only has a regular pin labelled vdd!, without any net expressions, so it makes sense that the pin doesn't follow the netset properties.

    However, it doesn't make sense to me that whoever designed this inverter didn't implement the net expression in the layout...

    Thanks for clearing this up. Now I just have to find a way to fix it, since this inverter is located in a read-only library. I guess I'll just copy it to my own lib and change it there.

    Edit: I didn't see you last post, and indeed the Assign Nets fixed it! So the recipe is simple: use netset properties in the schematic, and "Assign nets" in the layout. Unfortunate that this doesn't happen automatically, but at least there is a fix. Thanks for your help!

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  • Grover

    Ah, now I see what you meant. The inverter only has a regular pin labelled vdd!, without any net expressions, so it makes sense that the pin doesn't follow the netset properties.

    However, it doesn't make sense to me that whoever designed this inverter didn't implement the net expression in the layout...

    Thanks for clearing this up. Now I just have to find a way to fix it, since this inverter is located in a read-only library. I guess I'll just copy it to my own lib and change it there.

    Edit: I didn't see you last post, and indeed the Assign Nets fixed it! So the recipe is simple: use netset properties in the schematic, and "Assign nets" in the layout. Unfortunate that this doesn't happen automatically, but at least there is a fix. Thanks for your help!

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