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  3. Copying netset properties to layout

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Copying netset properties to layout

Grover
Grover over 15 years ago

I'm using a couple of cells in my circuits that have their power supply connections implemented as global nets (vdd! and gnd!). Now I want to use these within other cells that have their own supply rails (say, vdd_3 and vss_a), and connect the subcells' power supplies to the higher level cell's supply rails. I do this by adding the netset property to the appropriate instance, which connects the subcell's vdd! to the higher level cell's vdd_3.

Now this works fine in the simulator, but when I want to layout the circuit, it goes wrong, because the subcell still has its nets labelled vdd! and gnd!, and connecting them to vdd_3 and vss_a just gives me a flashing yellow cross.

I found in the manual that "the netSet properties on schematic instances, which specify the new value of a global signal, are not copied over with the instance from the schematic to the layout when you use the Gen From Source, Pick from Schematic, or Update Layout Parameters command", so this behaviour is as documented. But how do I fix it then? It's not possible to add a netset property to a layout instance, so I can't manually correct it after placement either.

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  • berndf
    berndf over 15 years ago

     Go to your layout pin and do an edit properties, check the
    "Connectivity" tab, there you are able to add netSet properties.

    Bernd

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  • Grover
    Grover over 15 years ago

    Hi Bernd,

    You mean the pins on the high level cell (my "own" pins)? There's a field to enter a net expression, but entering anything here doesn't solve the problem.

    To be more specific: the lower level cell has a property vdd, connected by vdd!, which I want to override and connect to vdd_a. So in the schematic editor, I add a netset property vdd, with value vdd_a.

    However, entering any combination of these names in the "Net expression" and "Default" fields in the properties form of the pin in the laout editor doesn't override the connection.

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  • berndf
    berndf over 15 years ago
    Honestly then I do not understand what you are trying to achieve. On the schematic side you are able to do a top down approach and inherit a net name down in the hiereachy through the inherited connections method (netSet properties). Whereas in the layout you design bottom up and all your pins should be clearly defined. Bernd
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  • Grover
    Grover over 15 years ago

    I've added a picture to hopefully show it more clearly. Schematic on the left, layout on the right (click it to view full size). The inverter has a net expression called vdd that defaults to vdd! (global). As shown in the schematic, I'm using a netset property to override it to become vdd_a instead of vdd!.

    This works fine, but when I export this schematic to a layout, the inverter still has its pin called vdd!, and I'm not allowed to connect it to vdd_a (there's a yellow cross). What should I do to fix this?

    • netset.PNG
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  • berndf
    berndf over 15 years ago

     Does your inverter layout pin has a netSet property at the pin or only a standrad pin

    called vdd!?

    That what I basicaly menat with my first post, ckeck this with the edit properties.

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  • berndf
    berndf over 15 years ago
    I checked this in my environment
    and you are right this seems to be an issue.

    I got it solved with "Connectivity -> Nets -> Assign"

    An then I assigned the new pin (vssa) to the std. cells instance pin (vdd!).
    Check the tool prompt line for instructions on the command.

    Bernd
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  • Grover
    Grover over 15 years ago

    Ah, now I see what you meant. The inverter only has a regular pin labelled vdd!, without any net expressions, so it makes sense that the pin doesn't follow the netset properties.

    However, it doesn't make sense to me that whoever designed this inverter didn't implement the net expression in the layout...

    Thanks for clearing this up. Now I just have to find a way to fix it, since this inverter is located in a read-only library. I guess I'll just copy it to my own lib and change it there.

    Edit: I didn't see you last post, and indeed the Assign Nets fixed it! So the recipe is simple: use netset properties in the schematic, and "Assign nets" in the layout. Unfortunate that this doesn't happen automatically, but at least there is a fix. Thanks for your help!

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